36 Commits

Author SHA1 Message Date
767dac7e73 Adjustments to IDE driver 2021-12-23 17:46:27 +01:00
6d946ddce3 Struct defining the EXT2 filesystems superblock 2021-12-23 17:44:27 +01:00
9173b90eb1 Structures added for MasterBootRecord support 2021-12-23 17:43:25 +01:00
bd5d3f5d49 Basic PIO ATA driver which can read and identify ata drives 2021-12-23 17:41:07 +01:00
2db83b33e1 ATAPI can identify a device correctly 2021-12-01 00:00:45 +01:00
5a68f77b33 Started the base implementation for PCI IDE drivers 2021-11-29 20:00:28 +01:00
72438ae70d Makefile: Added ISO test option for qemu. 2021-11-28 23:06:21 +01:00
a36e3d1c16 PCI support checked of on features.md, PCI enumeration screenshot added to readme.md 2021-11-28 21:12:12 +01:00
08b97af863 PCI: enumeration code cleanup 2021-11-28 21:07:05 +01:00
5089da5e9e PCI: Improved syntax of PCI enumeration, Added a PCI information storage class and structs 2021-11-28 16:46:16 +01:00
ec654143c6 Basic PCI Enumeration 2021-11-25 22:05:16 +01:00
23ede25ed6 Small changes to reflect renaming in readme.md 2021-11-22 20:04:14 +01:00
ba043ef31b Small improvements on Makefile, TODO.md has been renamed to features.md 2021-11-22 20:01:12 +01:00
88c5196586 Rewritten GDT logic 2021-11-16 21:17:49 +01:00
3a87b74224 Renaming/Moving stuff into a different file structure 2021-11-16 13:57:15 +01:00
32909aaed9 GDT is running again 2021-11-06 21:56:42 +01:00
5fb55367ca Implementation of simplistic physical memory manager 2021-11-06 16:27:13 +01:00
d79fc6e8e2 Split up boot.s into multiple assembly definitions, Started page frame allocator implementation, kterm definition is now considered c plus plus 2021-11-06 14:05:29 +01:00
bdcf9e66f8 Small adjustment in directory structure of memory and bootloader files in kernel 2021-11-02 21:15:00 +01:00
c9b789ed7b Added a bunch of new stuff no time to figure out what's what, No longer any compiler warnings 2021-11-02 21:03:11 +01:00
b4b615ae97 Checked off some todo's 2021-10-23 12:27:13 +01:00
092c5d520d Added option to create an iso 2021-10-23 12:26:15 +01:00
643f2d708b Added emulator options, Added header for VBE driver, Added CPUID function, Added demodisk.img as drive 2021-07-22 22:14:58 +01:00
f2c8b8ac5c Improved multiboot compliance 2021-07-22 20:02:47 +01:00
f48f8072c0 Merge InterruptHandling into MemoryManagement 2021-07-22 19:11:01 +01:00
7409e579c8 Basic keyboard input 2021-07-21 21:31:57 +01:00
04f941a625 Kernel now responding to keyboard interrupts 2021-05-28 22:20:13 +01:00
24a855bb3b Fix up wrong interrupt handler numbers in boot.s 2021-05-28 22:18:50 +01:00
83d220019c Nicer time print 2021-05-22 19:24:29 +01:00
48b65b2276 Kernel now enter continuous time telling mode 2021-05-18 21:14:26 +01:00
e0dfa69df8 Removed itoa and printf from idt 2021-05-18 21:13:14 +01:00
394882ca2e Added CMOS time read function, Added cariage return support to kterm 2021-05-18 21:11:48 +01:00
592db0ebcf More work on interrupt handling, Started timer interrupt implementation, PIC remapped hopefully successfull 2021-05-16 15:53:14 +01:00
28ac6a05af Interrupts are working.. processor no longer resets 2021-05-12 20:43:15 -04:00
0d0c06ab09 Working on PIC 2021-05-12 23:48:06 +01:00
5e668f5e67 Basics for an proper GDT and IDT 2021-05-12 23:03:00 +01:00
76 changed files with 3985 additions and 391 deletions

1
.gitattributes vendored
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@ -1,3 +1,4 @@
*.pdf filter=lfs diff=lfs merge=lfs -text
*.png filter=lfs diff=lfs merge=lfs -text
*.svg filter=lfs diff=lfs merge=lfs -text
demodisk.img filter=lfs diff=lfs merge=lfs -text

7
.gitignore vendored
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@ -1 +1,8 @@
build
CON
.vscode
isodir/
root/
*.iso
*.img

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@ -5,7 +5,22 @@ CC = ${HOME}/opt/cross/bin/i686-elf-gcc
CPP = ${HOME}/opt/cross/bin/i686-elf-g++
CFLAGS = -ffreestanding -O2 -Wall -Wextra
OFILES = $(BUILD_DIR)/boot.o $(BUILD_DIR)/kterm.o $(BUILD_DIR)/kernel.o $(BUILD_DIR)/io.o $(BUILD_DIR)/MMU.o
OFILES = \
$(BUILD_DIR)/boot.o \
$(BUILD_DIR)/kterm.o \
$(BUILD_DIR)/kernel.o \
$(BUILD_DIR)/PhysicalMemoryManager.o \
$(BUILD_DIR)/io.o \
$(BUILD_DIR)/PageDirectory.o \
$(BUILD_DIR)/gdtc.o \
$(BUILD_DIR)/idt.o \
$(BUILD_DIR)/pci.o \
$(BUILD_DIR)/pic.o \
$(BUILD_DIR)/string.o \
$(BUILD_DIR)/pcidevice.o \
$(BUILD_DIR)/atapiDevice.o
SRC_DIR = src
BUILD_DIR = build
@ -21,14 +36,28 @@ INTERNAL_OBJS = $(CRTI_OBJ) $(OFILES) $(CRTN_OBJ)
all: clean build
build: build_kernel run
build: build_kernel iso
run:
$(EMULATOR) -kernel $(BUILD_DIR)/myos.bin -serial stdio
clean_iso:
if [[ -a isodir/boot ]] ; then rm root/boot -rd ; fi
if [ -f build/barinkOS.iso ] ; then rm build/barinkOS.iso ; fi
iso: clean_iso clean build
mkdir -p root/boot/grub
cp build/myos.bin root/boot/myos.bin
cp src/grub.cfg root/boot/grub/grub.cfg
grub-mkrescue -o build/barinkOS.iso root
test:
$(EMULATOR) -kernel $(BUILD_DIR)/myos.bin -serial stdio -vga std -display gtk -m 2G -cpu core2duo
test_iso:
$(EMULATOR) -cdrom $(BUILD_DIR)/barinkOS.iso -serial stdio -vga std -display gtk -m 2G -cpu core2duo
build_kernel: $(OBJ_LINK_LIST)
$(CC) -T $(SRC_DIR)/kernel/arch/i386/linker.ld -o $(BUILD_DIR)/myos.bin \
$(CC) -T $(SRC_DIR)/kernel//linker.ld -o $(BUILD_DIR)/myos.bin \
-ffreestanding -O2 -nostdlib $(OBJ_LINK_LIST) -lgcc
build_x86_64:
@ -42,18 +71,44 @@ $(BUILD_DIR)/kernel.o:
$(CPP) -c $(SRC_DIR)/kernel/kernel.cpp -o $(BUILD_DIR)/kernel.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/kterm.o:
$(CC) -c $(SRC_DIR)/kernel/arch/i386/tty/kterm.c -o $(BUILD_DIR)/kterm.o $(CFLAGS) -std=gnu99
$(CPP) -c $(SRC_DIR)/kernel/tty/kterm.cpp -o $(BUILD_DIR)/kterm.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/boot.o:
$(AS) $(SRC_DIR)/kernel/arch/i386/boot.s -o $(BUILD_DIR)/boot.o
$(AS) $(SRC_DIR)/kernel//boot.S -o $(BUILD_DIR)/boot.o
$(BUILD_DIR)/crti.o:
$(AS) $(SRC_DIR)/kernel/arch/i386/crti.s -o $(BUILD_DIR)/crti.o
$(AS) $(SRC_DIR)/kernel/crti.s -o $(BUILD_DIR)/crti.o
$(BUILD_DIR)/crtn.o:
$(AS) $(SRC_DIR)/kernel/arch/i386/crtn.s -o $(BUILD_DIR)/crtn.o
$(AS) $(SRC_DIR)/kernel/crtn.s -o $(BUILD_DIR)/crtn.o
$(BUILD_DIR)/io.o:
$(CPP) -c $(SRC_DIR)/kernel/io.cpp -o $(BUILD_DIR)/io.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/MMU.o:
$(CPP) -c $(SRC_DIR)/kernel/MMU.cpp -o $(BUILD_DIR)/MMU.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/PageDirectory.o:
$(CPP) -c $(SRC_DIR)/kernel/memory/PageDirectory.cpp -o $(BUILD_DIR)/PageDirectory.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/idt.o:
$(CPP) -c $(SRC_DIR)/kernel/idt/idt.cpp -o $(BUILD_DIR)/idt.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/gdtc.o:
$(CPP) -c $(SRC_DIR)/kernel/gdt/gdtc.cpp -o $(BUILD_DIR)/gdtc.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/pic.o:
$(CPP) -c $(SRC_DIR)/kernel/pic/pic.cpp -o $(BUILD_DIR)/pic.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/string.o:
$(CC) -c $(SRC_DIR)/libc/include/string.c -o $(BUILD_DIR)/string.o $(CFLAGS) -std=gnu99
$(BUILD_DIR)/PhysicalMemoryManager.o:
$(CPP) -c $(SRC_DIR)/kernel/memory/PhysicalMemoryManager.cpp -o $(BUILD_DIR)/PhysicalMemoryManager.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/pci.o:
$(CPP) -c $(SRC_DIR)/kernel/pci.cpp -o $(BUILD_DIR)/pci.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/pcidevice.o:
$(CPP) -c $(SRC_DIR)/kernel/pci/pciDevice.cpp -o $(BUILD_DIR)/pcidevice.o $(CFLAGS) -fno-exceptions -fno-rtti
$(BUILD_DIR)/atapiDevice.o:
$(CPP) -c $(SRC_DIR)/kernel/drivers/atapi/atapiDevice.cpp -o $(BUILD_DIR)/atapiDevice.o $(CFLAGS) -fno-exceptions -fno-rtti

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@ -10,15 +10,24 @@ ________________________
The first scrolling boot screen. 😲
![Interrupt handeling](screenshots/WIP_interruptHandling.png) \
W.I.P - Working on interrupt handling
![Multiboot integration](screenshots/multiboot.png) \
Multiboot information can be read by the kernel.
![PCI enumeration](screenshots/PCIBusEnumeration.png) \
Enumerating the PCI bus
![ATAPI CD-ROM Identification](screenshots/CD-ROM_Identify.png) \
Correctly identified our ATAPI device 🎉
________________________
### The goal
Writing a hobby operating system to better understand the basic building blocks of any operating system.
________________________
### Operating System Technical specs/details
The operating system can print strings to the
@ -26,8 +35,8 @@ screen. The terminal/screen has scrolling so the latest messages are visible on
________________________
### Planning
[See TODO](TODO.md)
[See TODO](todo.md) \
[See Features](features.md)
________________________
### Docs
[Intro](docs/Intro.md) \

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@ -3,33 +3,33 @@
<input type="checkbox" checked/> Setup Cross-Compiler \
<input type="checkbox" checked/> Multiboot to kernel \
<input type="checkbox" checked/> Printing string to the screen \
<input type="checkbox" /> Printing values/numbers to the screen (a.k.k itoa) \
<input type="checkbox" /> Extend Multiboot implementation \
<input type="checkbox" checked/> Printing values/numbers to the screen (a.k.k itoa) \
<input type="checkbox" checked/> Extend Multiboot implementation \
<input type="checkbox" checked/> Output to serial port \
<input type="checkbox" /> Move to protected mode \
<input type="checkbox" /> Enabel CMOS clock \
<input type="checkbox" checked/> Move to protected mode \
<input type="checkbox" checked/> Enabel CMOS clock \
<input type="checkbox" /> Time measurement (PIC &| PIT) \
<input type="checkbox" /> Detect CPU speed \
<input type="checkbox" /> Interrupt / exception system (API) \
<input type="checkbox" checked/> Interrupt / exception system (API) \
<input type="checkbox" /> Plan your memory map (virtual, and physical) : decide where you want the data to be. \
<input type="checkbox" checked/> Plan your memory map (virtual, and physical) : decide where you want the data to be. \
<input type="checkbox" /> The heap: allocating memory at runtime (malloc and free) is almost impossible to go without. \
<input type="checkbox" /> Enable SIMD Extensions (SSE)
## Other features I am thinking of:
<input type="checkbox" /> PCI support \
<input type="checkbox" checked/> PCI support \
<input type="checkbox" /> ATA PIO Mode support \
<input type="checkbox" /> USTAR Filesystem ( For its simplicity this is very likely the first filesystem the OS is going to support) \
<input type="checkbox" /> ACPI support ( Or some other basic way to support shutdown, reboot and possibly hibernation ) \
<input type="checkbox" /> ATAPI support \
<input type="checkbox" /> Keyboard support ( P/S2 Keyboard) \
<input type="checkbox" /> Memory Management (MMU)\
<input type="checkbox" /> Preemptive multi tasking
<input type="checkbox" /> Processes
<input type="checkbox" checked/> Memory Management (MMU)
<input type="checkbox" /> Preemptive multi tasking \
<input type="checkbox" /> Processes \
<input type="checkbox" /> Threads
<input type="checkbox" /> Scheduling (SRV2 Unix OR Priority Based Round Robin) \
<input type="checkbox" /> System V ABI compliance (partially)
<input type="checkbox" /> POSIX compliance (partially)
<input type="checkbox" /> System V ABI compliance (partially) \
<input type="checkbox" /> POSIX compliance (partially) \
<input type="checkbox" /> RPC - for interprocess communication \
<input type="checkbox" /> Sync primitives - Semaphores, Mutexes, spinlocks et al. \
<input type="checkbox" /> Basic Terminal \
@ -37,4 +37,4 @@
<input type="checkbox" /> Basic Window server/client \
## Support for more filesystems if I like the challenge in writing these ...
<input type="checkbox" /> FAT Filesystem \
<input type="checkbox" /> EXT2 Filesystem \
<input type="checkbox" /> EXT2 Filesystem

BIN
screenshots/CD-ROM_Identify.png (Stored with Git LFS) Normal file

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screenshots/PCIBusEnumeration.png (Stored with Git LFS) Normal file

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screenshots/Screenshot from 2021-06-21 14-26-39.png (Stored with Git LFS) Normal file

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BIN
screenshots/WIP_interruptHandling.png (Stored with Git LFS) Normal file

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screenshots/multiboot.png (Stored with Git LFS) Normal file

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3
src/grub.cfg Normal file
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@ -0,0 +1,3 @@
menuentry "BarinkOS"{
multiboot /boot/myos.bin
}

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@ -1,14 +0,0 @@
#pragma once
#include <stdint.h>
extern "C" void loadPageDirectory (long unsigned int* addr );
extern "C" void enablePaging();
class MMU {
public:
void enable ();
private:
uint32_t page_directory[1024] __attribute__((aligned(4096)));
uint32_t first_page_table[1024] __attribute__((aligned(4096)));
};

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@ -0,0 +1,11 @@
#pragma once
#include <stdint.h>
#include "PartitionTableEntry.h"
struct MBR {
uint8_t code [440];
uint32_t uniqueID;
uint16_t Reserved;
PartitionTableEntry TableEntries[4];
uint16_t ValidBootsector;
}__attribute__((packed));

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@ -0,0 +1,11 @@
#pragma once
#include <stdint.h>
struct PartitionTableEntry{
uint8_t driveAttribute;
uint8_t CHS_start_address [3];
uint8_t PartitionType;
uint8_t CHS_lastSector_Address[3];
uint32_t LBA_partition_start;
uint32_t Number_sectors_inPartition;
}__attribute__((packed));

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@ -1,70 +0,0 @@
/*
* Multiboot
*/
.set ALIGN, 1<<0 /* align loaded modules on page boundaries */
.set MEMINFO, 1<<1 /* provide memory map */
.set FLAGS, ALIGN | MEMINFO /* this is the Multiboot 'flag' field */
.set MAGIC, 0x1BADB002 /* 'magic number' lets bootloader find the header */
.set CHECKSUM, -(MAGIC + FLAGS) /* checksum of above, to prove we are multiboot */
.section .multiboot
.align 4
.long MAGIC
.long FLAGS
.long CHECKSUM
.section .bss
.align 16
stack_bottom:
.skip 16384 # 16 KiB
stack_top:
.text
.globl enablePaging
enablePaging:
push %ebp
mov %esp, %ebp
mov %cr0, %eax
or $0x80000000, %eax
mov %eax, %cr0
mov %ebp, %esp
pop %ebp
ret
.text
.globl loadPageDirectory
loadPageDirectory:
push %ebp
mov %esp, %ebp
mov 8(%esp), %eax
mov %eax, %cr3
mov %ebp, %esp
pop %ebp
ret
.section .text
.global _start
.type _start, @function
_start:
mov $stack_top, %esp
call _init
call kernel_main
cli
1: hlt
jmp 1b
.size _start, . - _start

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@ -1,92 +0,0 @@
#include "kterm.h"
static const size_t VGA_WIDTH = 80;
static const size_t VGA_HEIGHT = 25;
size_t kterm_row;
size_t kterm_column;
uint8_t kterm_color;
uint16_t* kterm_buffer;
static inline uint8_t vga_entry_color( enum vga_color fg, enum vga_color bg) {
return fg | bg << 4;
}
static inline uint16_t vga_entry (unsigned char uc, uint8_t color) {
return (uint16_t) uc | (uint16_t) color << 8;
}
void kterm_init () {
kterm_row = 0;
kterm_column = 0;
kterm_color = vga_entry_color ( VGA_COLOR_LIGHT_GREY , VGA_COLOR_BLACK);
kterm_buffer = (uint16_t*) 0xB8000;
for (size_t y = 0; y < VGA_HEIGHT; y++ ){
for( size_t x = 0; x < VGA_WIDTH; x++){
const size_t index = y * VGA_WIDTH + x;
kterm_buffer[index] = vga_entry(' ', kterm_color);
}
}
}
void kterm_resetcolor(){
kterm_color = vga_entry_color ( VGA_COLOR_LIGHT_GREY , VGA_COLOR_BLACK);
}
void kterm_setcolor(uint8_t color){
kterm_color = color;
}
void kterm_putat (char c, uint8_t color, size_t x, size_t y ) {
const size_t index = y * VGA_WIDTH + x;
kterm_buffer[index] = vga_entry(c, color);
}
/**
* With the help from:
* https://whiteheadsoftware.dev/operating-systems-development-for-dummies/
**/
void kterm_scrollup(){
size_t i ;
for(i=0; i < (VGA_WIDTH * VGA_HEIGHT - VGA_WIDTH); i++)
kterm_buffer[i] = kterm_buffer[i+VGA_WIDTH];
for( i=0; i< VGA_WIDTH; i++)
kterm_buffer[(VGA_HEIGHT -1) * VGA_WIDTH + i ] = vga_entry(' ', kterm_color);
}
void kterm_put (char c) {
if(++kterm_column == VGA_WIDTH || c == '\n' ) {
kterm_column = 0;
if(kterm_row == VGA_HEIGHT-1) {
kterm_scrollup();
} else {
kterm_row ++;
}
}
if(c == '\n') return;
kterm_putat ( c, kterm_color, kterm_column, kterm_row);
}
void kterm_write(const char* data, size_t size) {
for(size_t i = 0; i < size; i++){
kterm_put(data[i]);
}
}
void kterm_writestring(const char* data ){
AS_KERNEL();
kterm_write(data, strlen(data));
}

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@ -1,23 +0,0 @@
#pragma once
#include <stdint.h>
#include <stddef.h>
#include <stdint.h>
#include <stdbool.h>
#include "../vga/colors.h"
void kterm_init();
void kterm_resetcolor();
void kterm_setcolor(uint8_t);
void kterm_putat(char, uint8_t, size_t, size_t);
void kterm_put(char);
void kterm_write(const char*, size_t);
void kterm_writestring(const char*);
void kterm_scrollup();
#define KernelTag "[Kernel]: "
#define AS_KERNEL() ( kterm_setcolor(VGA_COLOR_LIGHT_BLUE),\
kterm_write(KernelTag, 10 ), \
kterm_resetcolor())

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src/kernel/boot.S Normal file
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@ -0,0 +1,78 @@
/*
* Multiboot
*/
.set ALIGN, 1<<0 /* align loaded modules on page boundaries */
.set MEMINFO, 1<<1 /* provide memory map */
.set FLAGS, ALIGN | MEMINFO /* this is the Multiboot 'flag' field */
.set MAGIC, 0x1BADB002 /* 'magic number' lets bootloader find the header */
.set CHECKSUM, -(MAGIC + FLAGS) /* checksum of above, to prove we are multiboot */
.section .multiboot
.align 4
.long MAGIC
.long FLAGS
.long CHECKSUM
.section .bss
.align 16
stack_bottom:
.skip 16384 # 16 KiB
stack_top:
.section .text
.include "./src/kernel/irs_table.s"
.include "./src/kernel/irq_table.s"
.include "./src/kernel/idt/idt.s"
.include "./src/kernel/paging.s"
.global _start
.type _start, @function
_start:
/*Setup the stack pointer to point to the beginning of our stack */
/* I believe its a high address growing down to lower adress for the stack on x86*/
mov $stack_top, %esp
/*Reset EFLAGS*/
pushl $0
popf
/* push the pointer to the Multiboot information structure*/
pushl %ebx
/* push the magic value */
pushl %eax
call early_main
cli
.include "./src/kernel/gdt/gdt.s"
loadIDT:
#load idt
call init_idt
sti
# Try enable A20
# mov $0x2401, %ax
# int $0x15
# enable protected mode
mov %cr0, %eax
or $1, %eax
mov %eax, %cr0
call kernel_main
cli
1: hlt
jmp 1b
.size _start, . - _start

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src/kernel/bootcheck.h Normal file
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@ -0,0 +1,76 @@
#pragma once
#include "bootloader/multiboot.h"
#define CHECK_FLAG(flags, bit) ((flags) & (1 <<(bit)))
#include "tty/kterm.h"
void CheckMBT ( multiboot_info_t* mbt ){
/* Set MBI to the addresss of the multiboot information structure*/
multiboot_info_t * mbi = (multiboot_info_t *) mbt;
/* Print out the flags */
printf("flags = 0x%x\n", (unsigned) mbi->flags);
/* Are mem_* valid? */
if ( CHECK_FLAG(mbi->flags,0)){
printf("mem_lower = %uKB, mem_upper = %uKB\n");
}
/* is boot device valid ? */
if (CHECK_FLAG (mbi->flags, 1)){
printf("boot_device = 0x0%x\n", (unsigned) mbi->boot_device);
}
/* is the command line passed? */
if (CHECK_FLAG ( mbi->flags,2)){
printf("cmdline = %s\n", (char *) mbi->cmdline);
}
/* Are mods_* valid? */
if(CHECK_FLAG ( mbi->flags, 3)){
multiboot_module_t *mod;
uint32_t i;
printf("mods count = %d, mods_addr = 0x%x\n", (int) mbi->mods_count, (int) mbi->mods_addr);
for(i = 0, mod = (multiboot_module_t *) mbi->mods_addr; i < mbi->mods_count; i++ , mod++){
printf(" mod start = 0x%x, mod_end = 0x%x, cmdline = %s\n", (unsigned) mod->mod_start, (unsigned) mod->mod_end, (char*) mod->cmdline);
}
}
/* Bits 4 and 5 are mutually exclusive! */
if (CHECK_FLAG (mbi->flags, 4) && CHECK_FLAG(mbi->flags, 5)){
printf("Both bits 4 and 5 are set.\n");
return;
}
/* Is the symbol table of a.out valid? */
if (CHECK_FLAG(mbi->flags, 4)){
multiboot_aout_symbol_table_t *multiboot_aout_sym = &(mbi->u.aout_sym);
printf( "multiboot_aout_symbol_table: tabsize = 0x%0x, strsize = 0x%x, addr = 0x%x\n",
(unsigned) multiboot_aout_sym->tabsize,
(unsigned) multiboot_aout_sym->strsize,
(unsigned) multiboot_aout_sym->addr);
}
/* Is the section header table of ELF valid? */
if (CHECK_FLAG(mbi->flags, 5)){
multiboot_elf_section_header_table_t *multiboot_elf_sec = &(mbi->u.elf_sec);
printf("multiboot_elf_sec: num = %u, size = 0x%x, addr = 0x%x, shnd = 0x%x\n",
(unsigned) multiboot_elf_sec->num, (unsigned) multiboot_elf_sec->size,
(unsigned) multiboot_elf_sec->addr, (unsigned) multiboot_elf_sec->shndx);
}
/* Draw diagonal blue line */
if (CHECK_FLAG (mbt->flags, 12)){
printf("Can draw!");
}
}

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@ -0,0 +1,274 @@
/* multiboot.h - Multiboot header file. */
/* Copyright (C) 1999,2003,2007,2008,2009,2010 Free Software Foundation, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ANY
* DEVELOPER OR DISTRIBUTOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
* IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef MULTIBOOT_HEADER
#define MULTIBOOT_HEADER 1
/* How many bytes from the start of the file we search for the header. */
#define MULTIBOOT_SEARCH 8192
#define MULTIBOOT_HEADER_ALIGN 4
/* The magic field should contain this. */
#define MULTIBOOT_HEADER_MAGIC 0x1BADB002
/* This should be in %eax. */
#define MULTIBOOT_BOOTLOADER_MAGIC 0x2BADB002
/* Alignment of multiboot modules. */
#define MULTIBOOT_MOD_ALIGN 0x00001000
/* Alignment of the multiboot info structure. */
#define MULTIBOOT_INFO_ALIGN 0x00000004
/* Flags set in the flags member of the multiboot header. */
/* Align all boot modules on i386 page (4KB) boundaries. */
#define MULTIBOOT_PAGE_ALIGN 0x00000001
/* Must pass memory information to OS. */
#define MULTIBOOT_MEMORY_INFO 0x00000002
/* Must pass video information to OS. */
#define MULTIBOOT_VIDEO_MODE 0x00000004
/* This flag indicates the use of the address fields in the header. */
#define MULTIBOOT_AOUT_KLUDGE 0x00010000
/* Flags to be set in the flags member of the multiboot info structure. */
/* is there basic lower/upper memory information? */
#define MULTIBOOT_INFO_MEMORY 0x00000001
/* is there a boot device set? */
#define MULTIBOOT_INFO_BOOTDEV 0x00000002
/* is the command-line defined? */
#define MULTIBOOT_INFO_CMDLINE 0x00000004
/* are there modules to do something with? */
#define MULTIBOOT_INFO_MODS 0x00000008
/* These next two are mutually exclusive */
/* is there a symbol table loaded? */
#define MULTIBOOT_INFO_AOUT_SYMS 0x00000010
/* is there an ELF section header table? */
#define MULTIBOOT_INFO_ELF_SHDR 0X00000020
/* is there a full memory map? */
#define MULTIBOOT_INFO_MEM_MAP 0x00000040
/* Is there drive info? */
#define MULTIBOOT_INFO_DRIVE_INFO 0x00000080
/* Is there a config table? */
#define MULTIBOOT_INFO_CONFIG_TABLE 0x00000100
/* Is there a boot loader name? */
#define MULTIBOOT_INFO_BOOT_LOADER_NAME 0x00000200
/* Is there a APM table? */
#define MULTIBOOT_INFO_APM_TABLE 0x00000400
/* Is there video information? */
#define MULTIBOOT_INFO_VBE_INFO 0x00000800
#define MULTIBOOT_INFO_FRAMEBUFFER_INFO 0x00001000
#ifndef ASM_FILE
typedef unsigned char multiboot_uint8_t;
typedef unsigned short multiboot_uint16_t;
typedef unsigned int multiboot_uint32_t;
typedef unsigned long long multiboot_uint64_t;
struct multiboot_header
{
/* Must be MULTIBOOT_MAGIC - see above. */
multiboot_uint32_t magic;
/* Feature flags. */
multiboot_uint32_t flags;
/* The above fields plus this one must equal 0 mod 2^32. */
multiboot_uint32_t checksum;
/* These are only valid if MULTIBOOT_AOUT_KLUDGE is set. */
multiboot_uint32_t header_addr;
multiboot_uint32_t load_addr;
multiboot_uint32_t load_end_addr;
multiboot_uint32_t bss_end_addr;
multiboot_uint32_t entry_addr;
/* These are only valid if MULTIBOOT_VIDEO_MODE is set. */
multiboot_uint32_t mode_type;
multiboot_uint32_t width;
multiboot_uint32_t height;
multiboot_uint32_t depth;
};
/* The symbol table for a.out. */
struct multiboot_aout_symbol_table
{
multiboot_uint32_t tabsize;
multiboot_uint32_t strsize;
multiboot_uint32_t addr;
multiboot_uint32_t reserved;
};
typedef struct multiboot_aout_symbol_table multiboot_aout_symbol_table_t;
/* The section header table for ELF. */
struct multiboot_elf_section_header_table
{
multiboot_uint32_t num;
multiboot_uint32_t size;
multiboot_uint32_t addr;
multiboot_uint32_t shndx;
};
typedef struct multiboot_elf_section_header_table multiboot_elf_section_header_table_t;
struct multiboot_info
{
/* Multiboot info version number */
multiboot_uint32_t flags;
/* Available memory from BIOS */
multiboot_uint32_t mem_lower;
multiboot_uint32_t mem_upper;
/* "root" partition */
multiboot_uint32_t boot_device;
/* Kernel command line */
multiboot_uint32_t cmdline;
/* Boot-Module list */
multiboot_uint32_t mods_count;
multiboot_uint32_t mods_addr;
union
{
multiboot_aout_symbol_table_t aout_sym;
multiboot_elf_section_header_table_t elf_sec;
} u;
/* Memory Mapping buffer */
multiboot_uint32_t mmap_length;
multiboot_uint32_t mmap_addr;
/* Drive Info buffer */
multiboot_uint32_t drives_length;
multiboot_uint32_t drives_addr;
/* ROM configuration table */
multiboot_uint32_t config_table;
/* Boot Loader Name */
multiboot_uint32_t boot_loader_name;
/* APM table */
multiboot_uint32_t apm_table;
/* Video */
multiboot_uint32_t vbe_control_info;
multiboot_uint32_t vbe_mode_info;
multiboot_uint16_t vbe_mode;
multiboot_uint16_t vbe_interface_seg;
multiboot_uint16_t vbe_interface_off;
multiboot_uint16_t vbe_interface_len;
multiboot_uint64_t framebuffer_addr;
multiboot_uint32_t framebuffer_pitch;
multiboot_uint32_t framebuffer_width;
multiboot_uint32_t framebuffer_height;
multiboot_uint8_t framebuffer_bpp;
#define MULTIBOOT_FRAMEBUFFER_TYPE_INDEXED 0
#define MULTIBOOT_FRAMEBUFFER_TYPE_RGB 1
#define MULTIBOOT_FRAMEBUFFER_TYPE_EGA_TEXT 2
multiboot_uint8_t framebuffer_type;
union
{
struct
{
multiboot_uint32_t framebuffer_palette_addr;
multiboot_uint16_t framebuffer_palette_num_colors;
};
struct
{
multiboot_uint8_t framebuffer_red_field_position;
multiboot_uint8_t framebuffer_red_mask_size;
multiboot_uint8_t framebuffer_green_field_position;
multiboot_uint8_t framebuffer_green_mask_size;
multiboot_uint8_t framebuffer_blue_field_position;
multiboot_uint8_t framebuffer_blue_mask_size;
};
};
};
typedef struct multiboot_info multiboot_info_t;
struct multiboot_color
{
multiboot_uint8_t red;
multiboot_uint8_t green;
multiboot_uint8_t blue;
};
struct multiboot_mmap_entry
{
multiboot_uint32_t size;
multiboot_uint64_t addr;
multiboot_uint64_t len;
#define MULTIBOOT_MEMORY_AVAILABLE 1
#define MULTIBOOT_MEMORY_RESERVED 2
#define MULTIBOOT_MEMORY_ACPI_RECLAIMABLE 3
#define MULTIBOOT_MEMORY_NVS 4
#define MULTIBOOT_MEMORY_BADRAM 5
multiboot_uint32_t type;
} __attribute__((packed));
typedef struct multiboot_mmap_entry multiboot_memory_map_t;
struct multiboot_mod_list
{
/* the memory used goes from bytes mod_start to mod_end-1 inclusive */
multiboot_uint32_t mod_start;
multiboot_uint32_t mod_end;
/* Module command line */
multiboot_uint32_t cmdline;
/* padding to take it to 16 bytes (must be zero) */
multiboot_uint32_t pad;
};
typedef struct multiboot_mod_list multiboot_module_t;
/* APM BIOS info. */
struct multiboot_apm_info
{
multiboot_uint16_t version;
multiboot_uint16_t cseg;
multiboot_uint32_t offset;
multiboot_uint16_t cseg_16;
multiboot_uint16_t dseg;
multiboot_uint16_t flags;
multiboot_uint16_t cseg_len;
multiboot_uint16_t cseg_16_len;
multiboot_uint16_t dseg_len;
};
#endif /* ! ASM_FILE */
#endif /* ! MULTIBOOT_HEADER */

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src/kernel/cpu.h Normal file
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#include <cpuid.h> // NOTE: Only available in GCC
// NOT currently usefull!
/* static int get_model(){
int ebx, unused;
__cpuid(0, unused, ebx, unused, unused);
return ebx;
}
enum {
CPUID_FEAT_EDX_APIC = 1 << 9
};
static int check_apic (){
unsigned int eax, unused, edx;
__get_cpuid(1, &eax, &unused, &unused, &edx);
return edx & CPUID_FEAT_EDX_APIC;
}
*/

17
src/kernel/disk.h Normal file
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#pragma once
// Let's write an ATA PIO | ATA driver for now. Mostly to show that I can in theory interact with a
// storage device
// PRIMARY_ATA_BUS
// 0x1F0 through 0x1F7
// SECONDARY_ATA_BUS
// 0x170 through 0x177
#define DEVICE_CONTROL_REGISTER 0x3F6
#define DEVICE_CONTROL_ALTERNATE 0x376
// IRQ14 Primary bus interrupt
// IRQ15 Secondary bus interrupt

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#include "ataDevice.h"
#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
void ATA_DEVICE::Soft_Reset(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive){
printf("Soft reseting drive...\n");
outb(channels[DEVICE_CHANNEL].base + 7 , 0x4);
// wait a bit..
for(int i = 0 ; i < 1000000; i++){
asm volatile("NOP");
}
outb(channels[DEVICE_CHANNEL].base + 7 , 0x0);
}
void ATA_DEVICE::Identify(uint16_t DEVICE_CHANNEL,DEVICE_DRIVE drive ){
// lets ignore which port we actually want to check for now !
/*
THE STEPS INVOLVED
1. Select the target drive by sending master (0x0A) or slave (0x0B) to the
drive select IO port
2. Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
3. Send the identify command (0xEC) to the command IO port
4. Read the status port
4.2 If the value is 0x0 the drive does not exist
4.3 If it has any other value continue
5. poll the status port until bit 7 is clear.
6. Check if the LBAmid and LBAhi ports are non-zero
6.2. If non-zero stop polling this is not an ATA device
6.3 If zero continue
7. poll status port until bit 3 is set or bit 0 is set
8. if err is clear, read the data from the data port
*/
//printf("channel selected: 0x%x", DEVICE_CHANNEL);
// Assuming Master here
// Select the target drive
outb(DEVICE_CHANNEL | 6, drive); // on the primary bus select the master drive
outb(DEVICE_CHANNEL | 6 , 0x0); // write 0 to the controlport for some reason
outb(DEVICE_CHANNEL | 6, drive);
uint8_t status = inb(DEVICE_CHANNEL | 7 );
if(status == 0x00){
printf("No drive\n");
return;
}
// send the identify command;
outb(DEVICE_CHANNEL | 7, 0xEC);
// set the sectorCount, LBAlo, LBAmid, LBA,hi IO ports to 0
outb(DEVICE_CHANNEL | 2, 0);
outb(DEVICE_CHANNEL | 3, 0);
outb(DEVICE_CHANNEL | 4, 0);
outb(DEVICE_CHANNEL | 5, 0);
// send the identify command ;
//printf("command sent!\n");
outb(DEVICE_CHANNEL | 7 , 0xEC);
// read the status port
uint8_t status2 = inb(DEVICE_CHANNEL | 7);
if( status2 == 0x00){
printf("No drive\n");
return;
}
//printf("Waiting until ready...\n");
while(((status2 & 0x80 == 0x80)
&& (status2 & 0x01) != 0x01)
) status2 = inb(DEVICE_CHANNEL | 7);
if( status2 & 0x01){
printf("Error!\n");
return ;
}
uint16_t deviceIdentify [256] = {0};
for ( int i = 0; i < 256; i++){
uint16_t data;
asm volatile ("inw %1, %0" : "=a"(data): "Nd"(DEVICE_CHANNEL));
deviceIdentify[i] = data;
}
printf("Model-label (ASCII hex): ");
for(int i = 27; i < 47; i++){
kterm_put((char)(deviceIdentify[i] >> 8));
kterm_put((char)(deviceIdentify[i] & 0x00FF));
}
kterm_put('\n');
}
void ATA_DEVICE::Read(uint16_t DEVICE_CHANNEL, DEVICE_DRIVE drive, uint32_t LBA, uint16_t* buffer) {
/*
Assume you have a sectorcount byte and a 28 bit LBA value. A sectorcount of 0 means 256 sectors = 128K.
Notes: - When you send a command byte and the RDY bit of the Status Registers is clear, you may have to wait (technically up to 30 seconds) for the drive to spin up, before DRQ sets. You may also need to ignore ERR and DF the first four times that you read the Status, if you are polling.
- for polling PIO drivers: After transferring the last uint16_t of a PIO data block to the data IO port, give the drive a 400ns delay to reset its DRQ bit (and possibly set BSY again, while emptying/filling its buffer to/from the drive).
- on the "magic bits" sent to port 0x1f6: Bit 6 (value = 0x40) is the LBA bit. This must be set for either LBA28 or LBA48 transfers. It must be clear for CHS transfers. Bits 7 and 5 are obsolete for current ATA drives, but must be set for backwards compatibility with very old (ATA1) drives.
An example of a 28 bit LBA PIO mode read on the Primary bus:
*/
const int sectorCount = 1;
// Floating bus check
uint8_t floatingBus = inb(DEVICE_CHANNEL | 7);
if (floatingBus == 0xFF){
printf("Floating bus!!");
return ;
}
printf("Read LBA: 0x%x\n", LBA);
// Send 0xE0 for the "master" or 0xF0 for the "slave", ORed with the highest 4 bits of the LBA to port 0x1F6: outb(0x1F6, 0xE0 | (slavebit << 4) | ((LBA >> 24) & 0x0F))
outb(DEVICE_CHANNEL | 6 , ( 0xE0 | (LBA >>28) ) );
// Send a NULL byte to port 0x1F1, if you like (it is ignored and wastes lots of CPU time): outb(0x1F1, 0x00)
outb(DEVICE_CHANNEL | 1, 0x0000 );
//Send the sectorcount to port 0x1F2: outb(0x1F2, (unsigned char) count)
outb(DEVICE_CHANNEL | 2, sectorCount);
//Send the low 8 bits of the LBA to port 0x1F3: outb(0x1F3, (unsigned char) LBA))
outb(DEVICE_CHANNEL | 3, LBA);
//Send the next 8 bits of the LBA to port 0x1F4: outb(0x1F4, (unsigned char)(LBA >> 8))
outb(DEVICE_CHANNEL | 4, (LBA >> 8));
//Send the next 8 bits of the LBA to port 0x1F5: outb(0x1F5, (unsigned char)(LBA >> 16))
outb(DEVICE_CHANNEL | 5, (LBA >> 16));
//Send the "READ SECTORS" command (0x20) to port 0x1F7: outb(0x1F7, 0x20)
outb(DEVICE_CHANNEL | 7, 0x20);
volatile int i,j;
for(i=0;i<2000;i++)
for(j=0;j<25000;j++)
asm("NOP");
//Wait for an IRQ or poll.
uint8_t status = inb(DEVICE_CHANNEL | 7);
if( status == 0x00){
printf("No drive\n");
return;
}
printf("Status: %x\n", status);
// Check if busy!
while((status & 0x80) == 0x80){
printf("Reading....\r");
status = inb(DEVICE_CHANNEL | 7);
}
if ((status & 0x01) == 0x01){
printf("Error occured during read!\n");
return;
}
//Transfer 256 16-bit values, a uint16_t at a time, into your buffer from I/O port 0x1F0.
if( status & 0x01){
printf("Error!\n");
printf("Status: 0x%x\n", status);
uint16_t error_register = inb(DEVICE_CHANNEL | 1);
printf("Error register 0x%x\n",error_register );
return ;
}
for ( int i = 0; i < 256; i++){
uint16_t data;
asm volatile ("inw %1, %0" : "=a"(data): "Nd"(DEVICE_CHANNEL));
printf (" %x ", data);
buffer[i] = data;
}
//Then loop back to waiting for the next IRQ (or poll again -- see next note) for each successive sector.
}
void ATA_DEVICE::Write(uint16_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
printf("Not implemented\n");
}

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#pragma once
#include <stdint.h>
#include "../../io.h"
#include "../../ide/ideCommands.h"
#include "../../ide/sampleIDE.definitions.h"
#include "../../tty/kterm.h"
/*
* This first driver wil make use of IO ports.
* Doing so means reading or writing from disk is going
* to be very cpu intensive.
*
*/
enum DEVICE_DRIVE{
MASTER = 0xA0,
SLAVE = 0xB0
};
namespace ATA_DEVICE{
void Identify(uint16_t, DEVICE_DRIVE);
void Read (uint16_t, DEVICE_DRIVE, uint32_t, uint16_t*);
void Write(uint16_t, DEVICE_DRIVE);
void Soft_Reset(uint8_t ,DEVICE_DRIVE );
};

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#include "atapiDevice.h"
#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
bool isPacketDevice(){
uint8_t LBAmid = inb(0x174);
uint8_t LBAhi = inb(0x175);
printf(" LBAmid: 0x%x, LBAhi: 0x%x");
return LBAmid == 0x14 && LBAhi == 0xEB;
}
void ATAPI_DEVICE::Identify(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive ){
// lets ignore which port we actually want to check for now !
/* THE STEPS INVOLVED
1. Select the target drive by sending master (0x0A) or slave (0x0B) to the
drive select IO port
2. Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
3. Send the identify command (0xEC) to the command IO port
4. Read the status port
4.2 If the value is 0x0 the drive does not exist
4.3 If it has any other value continue
5. poll the status port until bit 7 is clear.
6. Check if the LBAmid and LBAhi ports are non-zero
6.2. If non-zero stop polling this is not an ATA device
6.3 If zero continue
7. poll status port until bit 3 is set or bit 0 is set
8. if err is clear, read the data from the data port
*/
// Select the target drive
outb(0x176, 0xA0); // on the secondary bus select the master drive
outb(0x170 + 0x206 , 0x0); // write 0 to the controlport for some reason
outb(0x176, 0xA0);
// read the status port
uint8_t status = inb(0x177);
printf("status after drive select: 0x%x\n",status);
if( status == 0x00){
printf("No drive\n");
return;
}
outb(0x176, 0xA0);
// Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
outb(0x172, 0);
outb(0x173, 0);
outb(0x174, 0);
outb(0x175, 0);
// send the identify command;
printf("command sent!\n");
outb(0x177, 0xA1);
// read the status port
uint8_t status2 = inb(0x177);
if( status2 == 0x00){
printf("No drive\n");
return;
}
printf("Waiting until ready...\n");
while(((status2 & 0x80 == 0x80)
&& (status2 & 0x01) != 0x01)
) status2 = inb(0x177);
if(status2 & 0x01){
printf("Error!");
return;
}
// READ DATA
uint16_t deviceIdentify [256] ={0};
for (int i= 0; i < 256; i++){
uint16_t data;
asm volatile ( "in %1, %0"
: "=a"(data)
: "Nd"(0x170) );
deviceIdentify[i] = data ;
}
printf("Model-label (ASCII hex):\n");
for(int i = 27; i < 47; i++){
printf(" %x ",deviceIdentify[i]);
}
printf("\nSerial number (ASCII hex):\n");
for (int i = 10; i < 19; i++){
printf(" %x ", deviceIdentify[i]);
}
printf("\nFirmware revision (ASCII hex):\n");
for (int i = 23; i < 26; i++){
printf(" %x ", deviceIdentify[i]);
}
printf("\nConfiguration: %x\n", deviceIdentify[0]);
printf("\nData received!\n");
}
void ATAPI_DEVICE::Read(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
printf("Not implemented");
}
void ATAPI_DEVICE::Write(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
printf("Not implemented");
}

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#pragma once
#include <stdint.h>
#include "../../io.h"
#include "../../ide/ideCommands.h"
#include "../../ide/sampleIDE.definitions.h"
#include "../../tty/kterm.h"
/*
* This first driver wil make use of IO ports.
* Doing so means reading or writing from disk is going
* to be very cpu intensive.
*
*/
enum DEVICE_DRIVE{
MASTER = 0xA0,
SLAVE = 0xB0
};
namespace ATAPI_DEVICE
{
bool isPacketDevice();
void Identify ( uint8_t, DEVICE_DRIVE );
void Read ( uint8_t, DEVICE_DRIVE );
void Write ( uint8_t, DEVICE_DRIVE );
};

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#pragma once
#include <stdint.h>
struct SuperBlock {
uint32_t NumberOfInodes;
uint32_t NumberOfBlocks;
uint32_t NumberOfReservedBlocks;
uint32_t NumberOfUnallocatedBlocks;
uint32_t NumberOfUnallocatedInodes;
uint32_t BlockNumberOfSuperBlock;
uint32_t BlockSize;// Something about a shift left
uint32_t FragmentSize;
uint32_t NumberOfBlocksInGroup;
uint32_t NumberOfFragmentsInBlockGroup;
uint32_t NumberOfInodesInBlockGroup;
uint32_t LastMountTime; // POSIX
uint32_t LastWrittenTime; // POSIX
uint16_t TimesMountedSinceCheck;
uint16_t TimesMountedUntilCheck;
uint16_t EXT_SIG ; // 0xef53
uint16_t FS_STATE;
uint16_t ON_ERR;
uint16_t VERSION_MINOR;
uint32_t TimeLastCheck; // POSIX
uint32_t CheckInterval; //POSIX
uint32_t OS_ID; // OS the FS was created with
uint32_t VERSION_MAJOR;
uint16_t UIDReservedBlocks;
uint16_t GIDReservedBlocks;
}__attribute__((packed));

19
src/kernel/gdt/gdt.s Normal file
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.global LoadGlobalDescriptorTable
LoadGlobalDescriptorTable:
lgdt gdtDescriptor
movw $16, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %fs
movw %ax, %gs
movw %ax, %ss
jmp $8,$flush
flush:
ret

57
src/kernel/gdt/gdtc.cpp Normal file
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#include "gdtc.h"
#include "../tty/kterm.h"
#define NULL_SEGMENT 0
#define KERNEL_CODE_SEGMENT 1
#define KERNEL_DATA_SEGMENT 2
#define USER_CODE_SEGMENT 3
#define USER_DATA_SEGMENT 4
SegmentDescriptor GlobalDescriptorTable[5];
GlobalDescriptorTableDescriptor gdtDescriptor;
void add_descriptor(int which , unsigned long base, unsigned long limit, unsigned char access, unsigned char granularity ){
GlobalDescriptorTable[which].base_low = (base & 0xFFFF );
GlobalDescriptorTable[which].base_middle = (base >> 6) & 0xFF;
GlobalDescriptorTable[which].base_high = (base >> 24) & 0xFF;
GlobalDescriptorTable[which].limit_low = (limit & 0xFFFF);
GlobalDescriptorTable[which].granularity = ((limit >> 16) & 0x0F);
GlobalDescriptorTable[which].granularity |= (granularity & 0xF0);
GlobalDescriptorTable[which].access = access;
}
void initGDT(){
// NULL segment
add_descriptor(NULL_SEGMENT, 0,0,0,0);
// Kernel Code Segment
add_descriptor(KERNEL_CODE_SEGMENT, 0, 0xFFFFFFFF, 0x9A, 0xCF);
// Kernel Data Segment
add_descriptor(KERNEL_DATA_SEGMENT, 0, 0xFFFFFFFF, 0x92, 0xCF);
// User Code Segment
// TODO:
// User Data Segement
// TODO:
// init Gdt Descriptor
gdtDescriptor.limit = ((sizeof(SegmentDescriptor ) * 5 ) - 1);
gdtDescriptor.base = (unsigned int) &GlobalDescriptorTable;
LoadGlobalDescriptorTable();
}

27
src/kernel/gdt/gdtc.h Normal file
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#include <stdint.h>
struct SegmentDescriptor {
unsigned short limit_low;
unsigned short base_low;
unsigned char base_middle;
unsigned char access;
unsigned char granularity;
unsigned char base_high;
}__attribute__((packed));
struct GlobalDescriptorTableDescriptor{
unsigned short limit;
unsigned int base;
}__attribute__((packed));
extern SegmentDescriptor GlobalDescriptorTable[];
extern GlobalDescriptorTableDescriptor gdtDescriptor;
void add_descriptor(int which , unsigned long base, unsigned long limit, unsigned char access, unsigned char granularity );
extern "C" void LoadGlobalDescriptorTable();
void initGDT();

97
src/kernel/ide/ide.h Normal file
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#pragma once
#include <stdint.h>
#include "../pci/pciDevice.h"
#include "../tty/kterm.h"
#include "ideCommands.h"
#include "sampleIDE.h"
#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
IDEChannelRegisters channels[2];
IDE_DEVICE ide_devices[4];
inline void CheckProgIF(uint8_t ProgIF){
if( IS_BIT_SET(ProgIF, 0) ) // Is the 0th bit set
{
printf ("Primary Channel is in PCI native mode\n");
} else{
printf("Primary Channel is in Compatibility mode\n");
}
if( IS_BIT_SET(ProgIF, 1)){
printf("Bit 0 can be modified\n");
}else{
printf("Bit 0 cannot be modified\n");
}
if( IS_BIT_SET(ProgIF, 2)){
printf("Secondary channel is in PCI native mode\n");
}else{
printf("Secondary channel is in Compatibility mode\n");
}
if( IS_BIT_SET(ProgIF, 3)){
printf("Bit 2 can be modified\n");
}else{
printf("Bit 2 cannot be modified\n");
}
if( IS_BIT_SET(ProgIF , 7)){
printf("This is a bus master IDE Controller\n");
} else{
printf("This controller doesn't support DMA!\n");
}
}
inline void TestIDEController(){
// Do stuff
printf("Testing IDE controllers\n");
// NOTE: Testing done with a hard coded known PCI addres
// Of an intel PIIX3 IDE Controller
int bus = 0;
int device =1 , function = 1;
PCIBusAddress IDEControllerPCIAddress = PCIBusAddress{bus,device, function};
uint8_t ProgIF = GetProgIF(IDEControllerPCIAddress);
printf( "ProgIF: 0x%x\n" ,ProgIF);
//CheckProgIF(ProgIF);
// For this test will just assume all bits are set
// the CheckProgIF can check but on the test machine all bits are set anyways
uint32_t BAR0,BAR1,BAR2,BAR3, BAR4;
BAR0 = ReadBAR(IDEControllerPCIAddress, 0);
BAR1 = ReadBAR(IDEControllerPCIAddress, 1);
BAR2 = ReadBAR(IDEControllerPCIAddress, 2);
BAR3 = ReadBAR(IDEControllerPCIAddress, 3);
BAR4 = ReadBAR(IDEControllerPCIAddress, 4);
// All bars are return 0xffffff for some as of yet mysterious reason!
printf( "BAR 0: 0x%x\n", BAR0);
printf( "BAR 1: 0x%x\n", BAR1);
printf( "BAR 2: 0x%x\n", BAR2);
printf( "BAR 3: 0x%x\n", BAR3);
printf( "BAR 4: 0x%x\n", BAR4);
init_IDE(BAR0, BAR1, BAR2, BAR3, BAR4);
// Read Something from disc
unsigned int maxByteCount = 20 ;
void* MDA_buffer = (void*)0xC0000000;
}

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#pragma once
// Commands
#define ATA_CMD_READ_PIO 0x20
#define ATA_CMD_READ_PIO_EXT 0x24
#define ATA_CMD_READ_DMA 0xC8
#define ATA_CMD_READ_DMA_EXT 0x25
#define ATA_CMD_WRITE_PIO 0x30
#define ATA_CMD_WRITE_PIO_EXT 0x34
#define ATA_CMD_WRITE_DMA 0xCA
#define ATA_CMD_WRITE_DMA_EXT 0x35
#define ATA_CMD_CACHE_FLUSH 0xE7
#define ATA_CMD_CACHE_FLUSH_EXT 0xEA
#define ATA_CMD_PACKET 0xA0
#define ATA_CMD_IDENTIFY_PACKET 0xA1
#define ATA_CMD_IDENTIFY 0xEC
#define ATAPI_CMD_READ 0xA8
#define ATAPI_CMD_EJECT 0x1B
#define ATA_IDENT_DEVICETYPE 0
#define ATA_IDENT_CYLINDERS 2
#define ATA_IDENT_HEADS 6
#define ATA_IDENT_SECTORS 12
#define ATA_IDENT_SERIAL 20
#define ATA_IDENT_MODEL 54
#define ATA_IDENT_CAPABILITIES 98
#define ATA_IDENT_FIELDVALID 106
#define ATA_IDENT_MAX_LBA 120
#define ATA_IDENT_COMMANDSETS 164
#define ATA_IDENT_MAX_LBA_EXT 200
#define IDE_ATA 0x00
#define IDE_ATAPI 0x01
#define ATA_MASTER 0x00
#define ATA_SLAVE 0x01
#define ATA_REG_DATA 0x00
#define ATA_REG_ERROR 0x01
#define ATA_REG_FEATURES 0x01
#define ATA_REG_SECCOUNT0 0x02
#define ATA_REG_LBA0 0x03
#define ATA_REG_LBA1 0x04
#define ATA_REG_LBA2 0x05
#define ATA_REG_HDDEVSEL 0x06
#define ATA_REG_COMMAND 0x07
#define ATA_REG_STATUS 0x07
#define ATA_REG_SECCOUNT1 0x08
#define ATA_REG_LBA3 0x09
#define ATA_REG_LBA4 0x0A
#define ATA_REG_LBA5 0x0B
#define ATA_REG_CONTROL 0x0C
#define ATA_REG_ALTSTATUS 0x0C
#define ATA_REG_DEVADDRESS 0x0D
// Channels:
#define ATA_PRIMARY 0x00
#define ATA_SECONDARY 0x01
// Directions:
#define ATA_READ 0x00
#define ATA_WRITE 0x01
// Status
#define ATA_SR_BSY 0x80 // Busy
#define ATA_SR_DRDY 0x40 // Drive ready
#define ATA_SR_DF 0x20 // Drive write fault
#define ATA_SR_DSC 0x10 // Drive seek complete
#define ATA_SR_DRQ 0x08 // Data request ready
#define ATA_SR_CORR 0x04 // Corrected data
#define ATA_SR_IDX 0x02 // Index
#define ATA_SR_ERR 0x01 // Error
// Errors
#define ATA_ER_BBK 0x80 // Bad block
#define ATA_ER_UNC 0x40 // Uncorrectable data
#define ATA_ER_MC 0x20 // Media changed
#define ATA_ER_IDNF 0x10 // ID mark not found
#define ATA_ER_MCR 0x08 // Media change request
#define ATA_ER_ABRT 0x04 // Command aborted
#define ATA_ER_TK0NF 0x02 // Track 0 not found
#define ATA_ER_AMNF 0x01 // No address mark

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#pragma once
struct IDEChannelRegisters{
unsigned short base; // I/O Base.
unsigned short ctrl; // Control Base
unsigned short bmide; // Bus Master IDE
unsigned char nIEN; // IEN (no interrupt)
};
struct IDE_DEVICE {
unsigned char Reserved; // 0 (Empty) or 1 (This device exists).
unsigned char Channel; // 0 (Primary Channel) or 1 (Secondary Channel).
unsigned char Drive; // 0 (Master Drive) or 1 (Slave Drive).
unsigned short Type; // 0 ATA, 1:ATAPI
unsigned short Signature; // Drive Signature
unsigned short Capabilities; // Features.
unsigned int CommandSets; // Command Sets Supported.
unsigned int Size; // Size in Sectors (NOTE: Seems unused nowadays as i've only seen the value be zero
unsigned char Model[41]; // Model in string.
} ;
extern IDEChannelRegisters channels[2];
extern IDE_DEVICE ide_devices[4];
extern unsigned char ide_buf[2048];
extern unsigned char ide_irq_invoked;
extern unsigned char atapi_packet[12];

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#pragma once
#include <stdint.h>
#include "../tty/kterm.h"
#include "sampleIDE.definitions.h"
#include "ideCommands.h"
void Detect_IO_Ports(uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4);
void DetectDevices();
unsigned char ide_buf[2048] = {0};
unsigned char ide_irq_invoked = 0;
unsigned char atapi_packet[12] = {0xA8,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
void wait(int t){
volatile int i,j;
for(i=0;i<t;i++)
for(j=0;j<25000;j++)
asm("NOP");
}
void ide_write(unsigned char channel, unsigned char reg, unsigned char data){
if (reg > 0x07 && reg < 0x0C)
ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
if (reg < 0x08)
outb(channels[channel].base + reg - 0x00, data);
else if (reg < 0x0C)
outb(channels[channel].base + reg - 0x06, data);
else if (reg < 0x0E)
outb(channels[channel].ctrl + reg - 0x0A, data);
else if (reg < 0x16)
outb(channels[channel].bmide + reg - 0x0E, data);
if (reg > 0x07 && reg < 0x0C)
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
}
unsigned char ide_read(unsigned char channel, unsigned char reg){
unsigned char result;
if( reg > 0x07 && reg < 0x0C)
ide_write(channel,ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
if( reg < 0x08)
result = inb(channels[channel].base + reg - 0x00);
else if (reg < 0x0C)
result = inb(channels[channel].base + reg - 0x06);
else if (reg < 0x0E)
result = inb(channels[channel].ctrl + reg - 0x0A);
else if (reg < 0x16)
result = inb(channels[channel].bmide + reg - 0x0E);
if (reg > 0x07 && reg < 0x0C)
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
return result;
}
void ide_read_buffer(unsigned char channel, unsigned char reg, unsigned int buffer, unsigned int quads){
if (reg > 0x07 && reg < 0x0C)
ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
if (reg < 0x08)
insl(channels[channel].base + reg - 0x00, (void *)buffer, quads);
else if (reg < 0x0C)
insl(channels[channel].base + reg - 0x06, (void *)buffer, quads);
else if (reg < 0x0E)
insl(channels[channel].ctrl + reg - 0x0A, (void *)buffer, quads);
else if (reg < 0x16)
insl(channels[channel].bmide + reg - 0x0E, (void *)buffer, quads);
if (reg > 0x07 && reg < 0x0C)
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
}
unsigned char ide_polling(unsigned char channel, unsigned int advanced_check) {
// (I) Delay 400 nanosecond for BSY to be set:
// -------------------------------------------------
for(int i = 0; i < 4; i++)
ide_read(channel, ATA_REG_ALTSTATUS); // Reading the Alternate Status port wastes 100ns; loop four times.
// (II) Wait for BSY to be cleared:
// -------------------------------------------------
while (ide_read(channel, ATA_REG_STATUS) & ATA_SR_BSY)
; // Wait for BSY to be zero.
if (advanced_check) {
unsigned char state = ide_read(channel, ATA_REG_STATUS); // Read Status Register.
// (III) Check For Errors:
// -------------------------------------------------
if (state & ATA_SR_ERR)
return 2; // Error.
// (IV) Check If Device fault:
// -------------------------------------------------
if (state & ATA_SR_DF)
return 1; // Device Fault.
// (V) Check DRQ:
// -------------------------------------------------
// BSY = 0; DF = 0; ERR = 0 so we should check for DRQ now.
if ((state & ATA_SR_DRQ) == 0)
return 3; // DRQ should be set
}
return 0; // No Error.
}
unsigned char ide_print_error(unsigned int drive, unsigned char err) {
if (err == 0)
return err;
printf("IDE:");
if (err == 1) {printf("- Device Fault\n "); err = 19;}
else if (err == 2) {
unsigned char st = ide_read(ide_devices[drive].Channel, ATA_REG_ERROR);
if (st & ATA_ER_AMNF) {printf("- No Address Mark Found\n "); err = 7;}
if (st & ATA_ER_TK0NF) {printf("- No Media or Media Error\n "); err = 3;}
if (st & ATA_ER_ABRT) {printf("- Command Aborted\n "); err = 20;}
if (st & ATA_ER_MCR) {printf("- No Media or Media Error\n "); err = 3;}
if (st & ATA_ER_IDNF) {printf("- ID mark not Found\n "); err = 21;}
if (st & ATA_ER_MC) {printf("- No Media or Media Error\n "); err = 3;}
if (st & ATA_ER_UNC) {printf("- Uncorrectable Data Error\n "); err = 22;}
if (st & ATA_ER_BBK) {printf("- Bad Sectors\n "); err = 13;}
} else if (err == 3) {printf("- Reads Nothing\n "); err = 23;}
else if (err == 4) {printf("- Write Protected\n "); err = 8;}
printf("- [%s %s] %s\n",
(const char *[]){"Primary", "Secondary"}[ide_devices[drive].Channel], // Use the channel as an index into the array
(const char *[]){"Master", "Slave"}[ide_devices[drive].Drive], // Same as above, using the drive
ide_devices[drive].Model);
return err;
}
inline void init_IDE( uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4)
{
Detect_IO_Ports( BAR0, BAR1, BAR2, BAR3, BAR4);
printf("ATA Primary port, base: 0x%x, ctrl: 0x%x\n", channels[ATA_PRIMARY].base , channels[ATA_PRIMARY].ctrl);
printf("ATA Secondary port, base: 0x%x, ctrl: 0x%x\n", channels[ATA_SECONDARY].base , channels[ATA_SECONDARY].ctrl);
// 2- Disable IRQs:
ide_write(ATA_PRIMARY , ATA_REG_CONTROL, 2);
ide_write(ATA_SECONDARY, ATA_REG_CONTROL, 2);
DetectDevices();
return;
// 4- Print Summary:
for (int i = 0; i < 4; i++)
if (ide_devices[i].Reserved == 1) {
printf(" Found %s Drive %d bytes - %x\n",
(const char *[]){"ATA", "ATAPI"}[ide_devices[i].Type], /* Type */
ide_devices[i].Size / 2, /* Size */
ide_devices[i].Model);
}
}
// 3- Detect ATA-ATAPI Devices:
void DetectDevices(){
int i, j, k, count = 0;
for (i = 0; i < 2; i++)
for (j = 0; j < 2; j++) {
unsigned char err = 0, type = IDE_ATA, status;
ide_devices[count].Reserved = 0; // Assuming that no drive here.
// (I) Select Drive:
ide_write(i, ATA_REG_HDDEVSEL, 0xA0 | (j << 4)); // Select Drive.
wait(1000); // Wait 1ms for drive select to work.
// (II) Send ATA Identify Command:
ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY);
wait(1000);
// (III) Polling:
if (ide_read(i, ATA_REG_STATUS) == 0) continue; // If Status = 0, No Device.
while(1) {
status = ide_read(i, ATA_REG_STATUS);
if ((status & ATA_SR_ERR)) {err = 1; break;} // If Err, Device is not ATA.
if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRQ)) break; // Everything is right.
}
// (IV) Probe for ATAPI Devices:
if (err != 0) {
unsigned char cl = ide_read(i, ATA_REG_LBA1);
unsigned char ch = ide_read(i, ATA_REG_LBA2);
if (cl == 0x14 && ch ==0xEB)
type = IDE_ATAPI;
else if (cl == 0x69 && ch == 0x96)
type = IDE_ATAPI;
else
continue; // Unknown Type (may not be a device).
ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY_PACKET);
wait(1000);
}
// (V) Read Identification Space of the Device:
ide_read_buffer(i, ATA_REG_DATA, (unsigned int) ide_buf, 128);
// (VI) Read Device Parameters:
ide_devices[count].Reserved = 1;
ide_devices[count].Type = type;
ide_devices[count].Channel = i;
ide_devices[count].Drive = j;
ide_devices[count].Signature = *((unsigned short *)(ide_buf + ATA_IDENT_DEVICETYPE));
ide_devices[count].Capabilities = *((unsigned short *)(ide_buf + ATA_IDENT_CAPABILITIES));
ide_devices[count].CommandSets = *((unsigned int *)(ide_buf + ATA_IDENT_COMMANDSETS));
// (VII) Get Size:
if (ide_devices[count].CommandSets & (1 << 26))
// Device uses 48-Bit Addressing:
ide_devices[count].Size = *((unsigned int *)(ide_buf + ATA_IDENT_MAX_LBA_EXT));
else
// Device uses CHS or 28-bit Addressing:
ide_devices[count].Size = *((unsigned int *)(ide_buf + ATA_IDENT_MAX_LBA));
// (VIII) String indicates model of device (like Western Digital HDD and SONY DVD-RW...):
for(k = 0; k < 40; k += 2) {
ide_devices[count].Model[k] = ide_buf[ATA_IDENT_MODEL + k + 1];
ide_devices[count].Model[k + 1] = ide_buf[ATA_IDENT_MODEL + k];}
ide_devices[count].Model[40] = 0; // Terminate String.
count++;
}
}
void Detect_IO_Ports(uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4){
// 1 Detect I/O Ports which interface an IDE Controller
// Based on the implementation within serenity
channels[ATA_PRIMARY].base = (BAR0 == 0x1 || BAR0 == 0x0) ? 0x1F0 : BAR0 & (~1);
channels[ATA_PRIMARY ].ctrl = (BAR1 == 0x1 || BAR1 == 0x0) ? 0x3F6 : BAR1 & (~1);
channels[ATA_SECONDARY].base = (BAR2 == 0x1 || BAR2 == 0x0) ? 0x170 : BAR2 & (~1);
channels[ATA_SECONDARY].ctrl = (BAR3 == 0x1 || BAR3 == 0x0) ? 0x376 : BAR3 & (~1);
channels[ATA_PRIMARY ].bmide = (BAR4 & (~1)) + 0; // Bus Master IDE
channels[ATA_SECONDARY].bmide = (BAR4 & (~1)) + 8; // Bus Master IDE
}

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#include "idt.h"
//#include "scancodes/set1.h"
IDT_entry idt_table[256];
IDT_ptr idt_ptr;
void set_id_entry (uint8_t num , uint32_t base, uint16_t sel, uint8_t flags){
idt_table[num].offset_1 = base & 0xFFFF;
idt_table[num].selector = sel;
idt_table[num].zero = 0;
idt_table[num].type_attr = flags;
idt_table[num].offset_2 = (base >> 16) & 0xFFFF;
};
void irs_handler (registers regs) {
kterm_writestring("received interrupt!\n");
printf("(IRS) Interrupt number: %d \n", regs.int_no);
if( regs.int_no == 13){
printf(" Error code: %d \n", regs.err_code);
}
}
void irq_handler (registers regs) {
if ( regs.int_no != 0) {
kterm_writestring("received interrupt!\n");
printf("(IRQ) Interrupt number: %d \n", regs.int_no);
}
if ( regs.int_no == 1 ){
// Keyboard interrupt !!
int scan;
/*register*/int i;
// Read scancode
scan = inb(0x60);
// Send ack message!
i = inb(0x61);
outb(0x61, i|0x80);
outb(0x61, i);
kterm_writestring("A key was pressed/released\n");
printf( "Scancode: %x\n", scan);
}
outb(0x20, 0x20); // send end of interrupt to master
if ( regs.int_no > 8 && regs.int_no <= 15) {
outb(0xA0, 0x20); // send end of interrupt to slave
}
if( regs.int_no == 13){
printf(" Error code: %d \n", regs.err_code);
}
}
void init_idt(){
// Initialise the IDT pointer
idt_ptr.length = sizeof(IDT_entry) * 255;
idt_ptr.base = (uint32_t)&idt_table;
// TODO: Set everything to zero first
set_id_entry(0, (uint32_t) irs0 , 0x08, 0x8F);
set_id_entry(1, (uint32_t) irs1 , 0x08, 0x8E);
set_id_entry(2, (uint32_t) irs2 , 0x08, 0x8E);
set_id_entry(3, (uint32_t) irs3 , 0x08, 0x8E);
set_id_entry(4, (uint32_t) irs4 , 0x08, 0x8E);
set_id_entry(5, (uint32_t) irs5 , 0x08, 0x8E);
set_id_entry(6, (uint32_t) irs6 , 0x08, 0x8E);
set_id_entry(7, (uint32_t) irs7 , 0x08, 0x8E);
set_id_entry(8, (uint32_t) irs8 , 0x08, 0x8E);
set_id_entry(9, (uint32_t) irs9 , 0x08, 0x8E);
set_id_entry(10, (uint32_t) irs10 , 0x08, 0x8E);
set_id_entry(11, (uint32_t) irs11 , 0x08, 0x8E);
set_id_entry(12, (uint32_t) irs12 , 0x08, 0x8E);
set_id_entry(13, (uint32_t) irs13 , 0x08, 0x8E);
set_id_entry(14, (uint32_t) irs14 , 0x08, 0x8E);
set_id_entry(15, (uint32_t) irs15 , 0x08, 0x8E);
set_id_entry(16, (uint32_t) irs16 , 0x08, 0x8E);
set_id_entry(17, (uint32_t) irs17 , 0x08, 0x8E);
set_id_entry(18, (uint32_t) irs18 , 0x08, 0x8E);
set_id_entry(19, (uint32_t) irs19 , 0x08, 0x8E);
set_id_entry(20, (uint32_t) irs20 , 0x08, 0x8E);
set_id_entry(21, (uint32_t) irs21 , 0x08, 0x8E);
set_id_entry(22, (uint32_t) irs22 , 0x08, 0x8E);
set_id_entry(23, (uint32_t) irs23 , 0x08, 0x8E);
set_id_entry(24, (uint32_t) irs24 , 0x08, 0x8E);
set_id_entry(25, (uint32_t) irs25 , 0x08, 0x8E);
set_id_entry(26, (uint32_t) irs26 , 0x08, 0x8E);
set_id_entry(27, (uint32_t) irs27 , 0x08, 0x8E);
set_id_entry(28, (uint32_t) irs28 , 0x08, 0x8E);
set_id_entry(29, (uint32_t) irs29 , 0x08, 0x8E);
set_id_entry(30, (uint32_t) irs30 , 0x08, 0x8E);
set_id_entry(31, (uint32_t) irs31 , 0x08, 0x8E);
//print_serial("Remapping PIC\n");
PIC_remap(0x20, 0x28);
// pic IRQ Table
set_id_entry(32, (uint32_t)irq0, 0x08, 0x8E);
set_id_entry(33, (uint32_t)irq1, 0x08, 0x8E);
set_id_entry(34, (uint32_t)irq2, 0x08, 0x8E);
set_id_entry(35, (uint32_t)irq3, 0x08, 0x8E);
set_id_entry(36, (uint32_t)irq4, 0x08, 0x8E);
set_id_entry(37, (uint32_t)irq5, 0x08, 0x8E);
set_id_entry(38, (uint32_t)irq6, 0x08, 0x8E);
set_id_entry(39, (uint32_t)irq7, 0x08, 0x8E);
set_id_entry(40, (uint32_t)irq8, 0x08, 0x8E);
set_id_entry(41, (uint32_t)irq9, 0x08, 0x8E);
set_id_entry(42, (uint32_t)irq10, 0x08, 0x8E);
set_id_entry(43, (uint32_t)irq11, 0x08, 0x8E);
set_id_entry(44, (uint32_t)irq12, 0x08, 0x8E);
set_id_entry(45, (uint32_t)irq13, 0x08, 0x8E);
set_id_entry(46, (uint32_t)irq14, 0x08, 0x8E);
set_id_entry(47, (uint32_t)irq15, 0x08, 0x8E);
idt_flush((uint32_t)&idt_ptr);
}

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#pragma once
#include "stdint.h"
#include "stddef.h"
#include "../vga/colors.h"
#include "../pic/pic.h"
#include "../tty/kterm.h"
extern "C" {
struct __attribute__((__packed__)) IDT_entry {
uint16_t offset_1;
uint16_t selector;
uint8_t zero;
uint8_t type_attr;
uint16_t offset_2;
};
struct __attribute__((__packed__)) IDT_ptr {
unsigned short length;
unsigned long base;
};
struct registers {
uint32_t ds; // Data segment selector
uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax; // Pushed by pusha.
uint32_t int_no, err_code; // Interrupt number and error code (if applicable)
uint32_t eip, cs, eflags, useresp, ss;
};
extern void idt_flush(uint32_t);
void set_id_entry (uint8_t num , uint32_t base, uint16_t sel, uint8_t flags);
void init_idt();
void irq_handler (registers regs);
void irs_handler (registers regs);
extern void irs0 ();
extern void irs1 ();
extern void irs2 ();
extern void irs3 ();
extern void irs4 ();
extern void irs5 ();
extern void irs6 ();
extern void irs7 ();
extern void irs8 ();
extern void irs9 ();
extern void irs10 ();
extern void irs11 ();
extern void irs12 ();
extern void irs13 ();
extern void irs14 ();
extern void irs15 ();
extern void irs16 ();
extern void irs17 ();
extern void irs18 ();
extern void irs19 ();
extern void irs20 ();
extern void irs21 ();
extern void irs22 ();
extern void irs23 ();
extern void irs24 ();
extern void irs25 ();
extern void irs26 ();
extern void irs27 ();
extern void irs28 ();
extern void irs29 ();
extern void irs30 ();
extern void irs31 ();
}

6
src/kernel/idt/idt.s Normal file
View File

@ -0,0 +1,6 @@
.globl idt_flush
idt_flush:
mov 4(%esp), %eax
lidt (%eax)
ret

View File

@ -0,0 +1,184 @@
#pragma once
// ScanCode set 1
int ScanCodeToKeyCode [0xD8];
/* key pressed scancode */
ScanCodeToKeyCode[0x01] = 4017; // escape pressed
ScanCodeToKeyCode[0x02] = 4018; // 1 pressed
ScanCodeToKeyCode[0x03] = 4019; // 2 pressed
ScanCodeToKeyCode[0x04] = 4020; // 3 pressed
ScanCodeToKeyCode[0x05] ="" // 4 pressed
ScanCodeToKeyCode[0x06] ="" // 5 pressed
ScanCodeToKeyCode[0x07] ="" // 6 pressed
ScanCodeToKeyCode[0x08] ="" // 7 pressed
ScanCodeToKeyCode[0x09] ="" // 8 pressed
ScanCodeToKeyCode[0x0A] ="" // 9 pressed
ScanCodeToKeyCode[0x0B] ="" // 0 (zero) pressed
ScanCodeToKeyCode[0x0C] ="" // - pressed
ScanCodeToKeyCode[0x0D] ="" // = pressed
ScanCodeToKeyCode[0x0E] ="" // backspace pressed
ScanCodeToKeyCode[0x0F] ="" // tab pressed
ScanCodeToKeyCode[0x10] ="" // Q pressed
ScanCodeToKeyCode[0x11] ="" // W pressed
ScanCodeToKeyCode[0x12] ="" // E pressed
ScanCodeToKeyCode[0x13] ="" // R pressed
ScanCodeToKeyCode[0x14] ="" // T pressed
ScanCodeToKeyCode[0x15] ="" // Y pressed
ScanCodeToKeyCode[0x16] ="" // U pressed
ScanCodeToKeyCode[0x17] ="" // I pressed
ScanCodeToKeyCode[0x18] ="" // O pressed
ScanCodeToKeyCode[0x19] ="" // P pressed
ScanCodeToKeyCode[0x1A] ="" // [ pressed
ScanCodeToKeyCode[0x1B] ="" // ] pressed
ScanCodeToKeyCode[0x1C] ="" // enter pressed
ScanCodeToKeyCode[0x1D] ="" // left control pressed
ScanCodeToKeyCode[0x1E] ="" // A pressed
ScanCodeToKeyCode[0x1F] ="" // S pressed
ScanCodeToKeyCode[0x20] ="" // D pressed
ScanCodeToKeyCode[0x21] ="" // F pressed
ScanCodeToKeyCode[0x22] ="" // G pressed
ScanCodeToKeyCode[0x23] ="" // H pressed
ScanCodeToKeyCode[0x24] ="" // J pressed
ScanCodeToKeyCode[0x25] ="" // K pressed
ScanCodeToKeyCode[0x26] ="" // L pressed
ScanCodeToKeyCode[0x27] ="" // ; pressed
ScanCodeToKeyCode[0x28] ="" // ' (single quote) pressed
ScanCodeToKeyCode[0x29] ="" // ` (back tick) pressed
ScanCodeToKeyCode[0x2A] ="" // left shift pressed
ScanCodeToKeyCode[0x2B] ="" // \ pressed
ScanCodeToKeyCode[0x2C] ="" // Z pressed
ScanCodeToKeyCode[0x2D] ="" // X pressed
ScanCodeToKeyCode[0x2E] ="" // C pressed
ScanCodeToKeyCode[0x2F] ="" // V pressed
ScanCodeToKeyCode[0x30] ="" // B pressed
ScanCodeToKeyCode[0x31] ="" // N pressed
ScanCodeToKeyCode[0x32] ="" // M pressed
ScanCodeToKeyCode[0x33] ="" // , pressed
ScanCodeToKeyCode[0x34] ="" // . pressed
ScanCodeToKeyCode[0x35] ="" // / pressed
ScanCodeToKeyCode[0x36] ="" // right shift pressed
ScanCodeToKeyCode[0x37] ="" // (keypad) * pressed
ScanCodeToKeyCode[0x38] ="" // left alt pressed
ScanCodeToKeyCode[0x39] ="" // space pressed
ScanCodeToKeyCode[0x3A] ="" // CapsLock pressed
ScanCodeToKeyCode[0x3B] ="" // F1 pressed
ScanCodeToKeyCode[0x3C] ="" // F2 pressed
ScanCodeToKeyCode[0x3D] ="" // F3 pressed
ScanCodeToKeyCode[0x3E] ="" // F4 pressed
ScanCodeToKeyCode[0x3F] ="" // F5 pressed
ScanCodeToKeyCode[0x40] ="" // F6 pressed
ScanCodeToKeyCode[0x41] ="" // F7 pressed
ScanCodeToKeyCode[0x42] ="" // F8 pressed
ScanCodeToKeyCode[0x43] ="" // F9 pressed
ScanCodeToKeyCode[0x44] ="" // F10 pressed
ScanCodeToKeyCode[0x45] ="" // NumberLock pressed
ScanCodeToKeyCode[0x46] ="" // ScrollLock pressed
ScanCodeToKeyCode[0x47] ="" // (keypad) 7 pressed
ScanCodeToKeyCode[0x48] ="" // (keypad) 8 pressed
ScanCodeToKeyCode[0x49] ="" // (keypad) 9 pressed
ScanCodeToKeyCode[0x4A] ="" // (keypad) - pressed
ScanCodeToKeyCode[0x4B] ="" // (keypad) 4 pressed
ScanCodeToKeyCode[0x4C] ="" // (keypad) 5 pressed
ScanCodeToKeyCode[0x4D] ="" // (keypad) 6 pressed
ScanCodeToKeyCode[0x4E] ="" // (keypad) + pressed
ScanCodeToKeyCode[0x4F] ="" // (keypad) 1 pressed
ScanCodeToKeyCode[0x50] ="" // (keypad) 2 pressed
ScanCodeToKeyCode[0x51] ="" // (keypad) 3 pressed
ScanCodeToKeyCode[0x52] ="" // (keypad) 0 pressed
ScanCodeToKeyCode[0x53] ="" // (keypad) . pressed
ScanCodeToKeyCode[0x57] ="" // F11 pressed
ScanCodeToKeyCode[0x58] ="" // F12 pressed
/* key released scanCode.""*/
ScanCodeToKeyCode[0x81] ="" // escape released
ScanCodeToKeyCode[0x82] ="" // 1 released
ScanCodeToKeyCode[0x83] ="" // 2 released
ScanCodeToKeyCode[0x84] ="" // 3 released
ScanCodeToKeyCode[0x85] ="" // 4 released
ScanCodeToKeyCode[0x86] ="" // 5 released
ScanCodeToKeyCode[0x87] ="" // 6 released
ScanCodeToKeyCode[0x88] ="" // 7 released
ScanCodeToKeyCode[0x89] ="" // 8 released
ScanCodeToKeyCode[0x8A] ="" // 9 released
ScanCodeToKeyCode[0x8B] ="" // 0 (zero) released
ScanCodeToKeyCode[0x8C] ="" // - released
ScanCodeToKeyCode[0x8D] ="" // = released
ScanCodeToKeyCode[0x8E] ="" // backspace released
ScanCodeToKeyCode[0x8F] ="" // tab released
ScanCodeToKeyCode[0x90] ="" // Q released
ScanCodeToKeyCode[0x91] ="" // W released
ScanCodeToKeyCode[0x92] ="" // E released
ScanCodeToKeyCode[0x93] ="" // R released
ScanCodeToKeyCode[0x94] ="" // T released
ScanCodeToKeyCode[0x95] ="" // Y released
ScanCodeToKeyCode[0x96] ="" // U released
ScanCodeToKeyCode[0x97] ="" // I released
ScanCodeToKeyCode[0x98] ="" // O released
ScanCodeToKeyCode[0x99] ="" // P released
ScanCodeToKeyCode[0x9A] ="" // [ released
ScanCodeToKeyCode[0x9B] ="" // ] released
ScanCodeToKeyCode[0x9C] ="" // enter released
ScanCodeToKeyCode[0x9D] ="" // left control released
ScanCodeToKeyCode[0x9E] ="" // A released
ScanCodeToKeyCode[0x9F] ="" // S released
ScanCodeToKeyCode[0xA0] ="" // D released
ScanCodeToKeyCode[0xA1] ="" // F released
ScanCodeToKeyCode[0xA2] ="" // G released
ScanCodeToKeyCode[0xA3] ="" // H released
ScanCodeToKeyCode[0xA4] ="" // J released
ScanCodeToKeyCode[0xA5] ="" // K released
ScanCodeToKeyCode[0xA6] ="" // L released
ScanCodeToKeyCode[0xA7] ="" // ; released
ScanCodeToKeyCode[0xA8] ="" // ' (single quote) released
ScanCodeToKeyCode[0xA9] ="" // ` (back tick) released
ScanCodeToKeyCode[0xAA] ="" // left shift released
ScanCodeToKeyCode[0xAB] ="" // \ released
ScanCodeToKeyCode[0xAC] ="" // Z released
ScanCodeToKeyCode[0xAD] ="" // X released
ScanCodeToKeyCode[0xAE] ="" // C released
ScanCodeToKeyCode[0xAF] ="" // V released
ScanCodeToKeyCode[0xB0] ="" // B released
ScanCodeToKeyCode[0xB1] ="" // N released
ScanCodeToKeyCode[0xB2] ="" // M released
ScanCodeToKeyCode[0xB3] ="" // , released
ScanCodeToKeyCode[0xB4] ="" // . released
ScanCodeToKeyCode[0xB5] ="" // / released
ScanCodeToKeyCode[0xB6] ="" // right shift released
ScanCodeToKeyCode[0xB7] ="" // (keypad) * released
ScanCodeToKeyCode[0xB8] ="" // left alt released
ScanCodeToKeyCode[0xB9] ="" // space released
ScanCodeToKeyCode[0xBA] ="" // CapsLock released
ScanCodeToKeyCode[0xBB] ="" // F1 released
ScanCodeToKeyCode[0xBC] ="" // F2 released
ScanCodeToKeyCode[0xBD] ="" // F3 released
ScanCodeToKeyCode[0xBE] ="" // F4 released
ScanCodeToKeyCode[0xBF] ="" // F5 released
ScanCodeToKeyCode[0xC0] ="" // F6 released
ScanCodeToKeyCode[0xC1] ="" // F7 released
ScanCodeToKeyCode[0xC2] ="" // F8 released
ScanCodeToKeyCode[0xC3] ="" // F9 released
ScanCodeToKeyCode[0xC4] ="" // F10 released
ScanCodeToKeyCode[0xC5] ="" // NumberLock released
ScanCodeToKeyCode[0xC6] ="" // ScrollLock released
ScanCodeToKeyCode[0xC7] ="" // (keypad) 7 released
ScanCodeToKeyCode[0xC8] ="" // (keypad) 8 released
ScanCodeToKeyCode[0xC9] ="" // (keypad) 9 released
ScanCodeToKeyCode[0xCA] ="" // (keypad) - released
ScanCodeToKeyCode[0xCB] ="" // (keypad) 4 released
ScanCodeToKeyCode[0xCC] ="" // (keypad) 5 released
ScanCodeToKeyCode[0xCD] ="" // (keypad) 6 released
ScanCodeToKeyCode[0xCE] ="" // (keypad) + released
ScanCodeToKeyCode[0xCF] ="" // (keypad) 1 released
ScanCodeToKeyCode[0xD0] ="" // (keypad) 2 released
ScanCodeToKeyCode[0xD1] ="" // (keypad) 3 released
ScanCodeToKeyCode[0xD2] ="" // (keypad) 0 released
ScanCodeToKeyCode[0xD3] ="" // (keypad) . released
ScanCodeToKeyCode[0xD7] ="" // F11 released
ScanCodeToKeyCode[0xD8] ="" // F12 released

View File

@ -1,19 +1,25 @@
#include "io.h"
unsigned char inb_p(unsigned short ){
// TODO: implement me!
return 0;
}
unsigned short inw(unsigned short ){
// TODO: implement me!
return 0;
}
unsigned short inw_p(unsigned short ){
// TODO: implement me!
return 0;
}
unsigned int inl(unsigned short ){
uint32_t inl( int port ){
unsigned int data;
asm volatile ("inl %w1, %0": "=a" (data): "d" (port));
return data;
}
unsigned int inl_p(unsigned short ){
// TODO: implement me!
return 0;
}
@ -26,9 +32,12 @@ void outw(unsigned short , unsigned short ){
void outw_p(unsigned short , unsigned short ){
}
void outl(unsigned int , unsigned short ){
void outl( int port , uint32_t data ){
asm volatile ("outl %0, %1" :: "a" (data), "dn"(port));
}
void outl_p(unsigned int , unsigned short ){
}
@ -57,3 +66,11 @@ void outsl(unsigned short , const void *,
unsigned long ){
}
void io_wait(void)
{
/* TODO: This is probably fragile. */
asm volatile ( "jmp 1f\n\t"
"1:jmp 2f\n\t"
"2:" );
}

View File

@ -12,21 +12,17 @@ static inline uint8_t inb(uint16_t port)
unsigned char inb_p(unsigned short port);
unsigned short inw(unsigned short port);
unsigned short inw_p(unsigned short port);
unsigned int inl(unsigned short port);
uint32_t inl( int port );
unsigned int inl_p(unsigned short port);
static inline void outb(uint16_t port, uint8_t val)
{
asm volatile ( "outb %0, %1" : : "a"(val), "Nd"(port) );
/* There's an outb %al, $imm8 encoding, for compile-time constant port numbers that fit in 8b. (N constraint).
* Wider immediate constants would be truncated at assemble-time (e.g. "i" constraint).
* The outb %al, %dx encoding is the only option for all other cases.
* %1 expands to %dx because port is a uint16_t. %w1 could be used if we had the port number a wider C type */
}
void outb_p(unsigned char value, unsigned short port);
void outw(unsigned short value, unsigned short port);
void outw_p(unsigned short value, unsigned short port);
void outl(unsigned int value, unsigned short port);
void outl( int port , uint32_t data );
void outl_p(unsigned int value, unsigned short port);
void insb(unsigned short port, void *addr,
@ -41,3 +37,4 @@ void outsw(unsigned short port, const void *addr,
unsigned long count);
void outsl(unsigned short port, const void *addr,
unsigned long count);
void io_wait();

138
src/kernel/irq_table.s Normal file
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@ -0,0 +1,138 @@
.globl irq0
irq0:
cli
push $0
push $0
jmp irq_common
.globl irq1
irq1:
cli
push $0
push $1
jmp irq_common
.globl irq2
irq2:
cli
push $0
push $2
jmp irq_common
.globl irq3
irq3:
cli
push $0
push $3
jmp irq_common
.globl irq4
irq4:
cli
push $0
push $4
jmp irq_common
.globl irq5
irq5:
cli
push $0
push $5
jmp irq_common
.globl irq6
irq6:
cli
push $0
push $6
jmp irq_common
.globl irq7
irq7:
cli
push $0
push $7
jmp irq_common
.globl irq8
irq8:
cli
push $0
push $8
jmp irq_common
.globl irq9
irq9:
cli
push $0
push $9
jmp irq_common
.globl irq10
irq10:
cli
push $0
push $10
jmp irq_common
.globl irq11
irq11:
cli
push $0
push $11
jmp irq_common
.globl irq12
irq12:
cli
push $0
push $12
jmp irq_common
.globl irq13
irq13:
cli
push $0
push $13
jmp irq_common
.globl irq14
irq14:
cli
push $0
push $14
jmp irq_common
.globl irq15
irq15:
cli
push $0
push $15
jmp irq_common
irq_common:
pusha
mov %ds, %ax
push %eax
mov $0x10, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
call irq_handler
pop %eax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
popa
add $8, %esp # cleans push error and irs code
sti
iret # pops 5 things at once: CS, EIP, EFLAGS, SS, and ESP

256
src/kernel/irs_table.s Normal file
View File

@ -0,0 +1,256 @@
/*
* Interupt handlers
*/
.globl irs0
irs0:
cli
push $0
push $0
jmp irs_common
.globl irs1
irs1:
cli
push $0
push $1
jmp irs_common
.globl irs2
irs2:
cli
push $0
push $2
jmp irs_common
.globl irs3
irs3:
cli
push $0
push $3
jmp irs_common
.globl irs4
irs4:
cli
push $0
push $4
jmp irs_common
.globl irs5
irs5:
cli
push $0
push $5
jmp irs_common
.globl irs6
irs6:
cli
push $0
push $6
jmp irs_common
.globl irs7
irs7:
cli
push $0
push $7
jmp irs_common
.globl irs8
irs8:
cli
push $0
push $8
jmp irs_common
.globl irs9
irs9:
cli
push $0
push $9
jmp irs_common
.globl irs10
irs10:
cli
push $0
push $10
jmp irs_common
.globl irs11
irs11:
cli
push $0
push $11
jmp irs_common
.globl irs12
irs12:
cli
push $0
push $12
jmp irs_common
.globl irs13
irs13:
cli
push $13
jmp irs_common
.globl irs14
irs14:
cli
push $0
push $14
jmp irs_common
.globl irs15
irs15:
cli
push $0
push $15
jmp irs_common
.globl irs16
irs16:
cli
push $0
push $16
jmp irs_common
.globl irs17
irs17:
cli
push $0
push $17
jmp irs_common
.globl irs18
irs18:
cli
push $0
push $18
jmp irs_common
.globl irs19
irs19:
cli
push $0
push $19
jmp irs_common
.globl irs20
irs20:
cli
push $0
push $20
jmp irs_common
.globl irs21
irs21:
cli
push $0
push $21
jmp irs_common
.globl irs22
irs22:
cli
push $0
push $22
jmp irs_common
.globl irs23
irs23:
cli
push $0
push $23
jmp irs_common
.globl irs24
irs24:
cli
push $0
push $24
jmp irs_common
.globl irs25
irs25:
cli
push $0
push $25
jmp irs_common
.globl irs26
irs26:
cli
push $0
push $26
jmp irs_common
.globl irs27
irs27:
cli
push $0
push $27
jmp irs_common
.globl irs28
irs28:
cli
push $0
push $28
jmp irs_common
.globl irs29
irs29:
cli
push $0
push $29
jmp irs_common
.globl irs30
irs30:
cli
push $0
push $30
jmp irs_common
.globl irs31
irs31:
cli
push $0
push $31
jmp irs_common
irs_common:
pusha # Pushes edi,esi,ebp,esp,ebx,edx,ecx,eax
mov %ds, %ax
push %eax
/* load the kernel data segment descriptor*/
mov $0x10, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
call irs_handler
pop %eax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
popa
add $8, %esp # cleans push error and irs code
sti
iret # pops 5 things at once: CS, EIP, EFLAGS, SS, and ESP

View File

@ -1,136 +1,113 @@
#include "kernel.h"
/**
* simple delay function
**/
void delay(int t){
volatile int i,j;
for(i=0;i<t;i++)
for(j=0;j<25000;j++)
asm("NOP");
}
#define GB4 524288
#define GB2 262144
class Test {
public:
Test();
void printMe();
~Test();
};
int memcmp( const void* ptr1, const void* ptr2, size_t num);
extern "C" void kernel_main (void);
Test::Test(){
kterm_writestring("Create a test object\n");
};
void Test::printMe(){
kterm_writestring("testObject.printMe()\n");
}
Test::~Test(){
kterm_writestring("Destroy testObject! Bye bye\n");
}
#define PORT 0x3f8
static int init_serial() {
outb(PORT + 1, 0x00); // Disable all interrupts
outb(PORT + 3, 0x80); // Enable DLAB (set baud rate divisor)
outb(PORT + 0, 0x03); // Set divisor to 3 (lo byte) 38400 baud
outb(PORT + 1, 0x00); // (hi byte)
outb(PORT + 3, 0x03); // 8 bits, no parity, one stop bit
outb(PORT + 2, 0xC7); // Enable FIFO, clear them, with 14-byte threshold
outb(PORT + 4, 0x0B); // IRQs enabled, RTS/DSR set
outb(PORT + 4, 0x1E); // Set in loopback mode, test the serial chip
outb(PORT + 0, 0xAE); // Test serial chip (send byte 0xAE and check if serial returns same byte)
// Check if serial is faulty (i.e: not same byte as sent)
if(inb(PORT + 0) != 0xAE) {
return 1;
}
// If serial is not faulty set it in normal operation mode
// (not-loopback with IRQs enabled and OUT#1 and OUT#2 bits enabled)
outb(PORT + 4, 0x0F);
return 0;
}
int is_transmit_empty() {
return inb(PORT + 5) & 0x20;
}
void write_serial(char a) {
while (is_transmit_empty() == 0);
outb(PORT,a);
}
int serial_received() {
return inb(PORT + 5) & 1;
}
char read_serial() {
while (serial_received() == 0);
return inb(PORT);
}
void test_serial(){
/** Serial test **/
kterm_writestring("Writing to COM1 serial port:");
init_serial();
write_serial('A');
write_serial('B');
write_serial('C');
write_serial('D');
write_serial('E');
char Character_received = read_serial();
kterm_writestring("\n");
kterm_writestring("received from COM 1: \n");
kterm_put(Character_received);
kterm_writestring("\n");
}
extern "C" {
void kernel_main (void) {
extern "C" void early_main(unsigned long magic, unsigned long addr){
/** initialize terminal interface */
kterm_init();
/** Wrtite stuff to the screen to test the terminal**/
kterm_writestring("Hello world!\n");
kterm_writestring("We got newline support!\n");
/** Test scrolling **/
for(int i=0; i < 5; i++){
delay(500);
kterm_writestring("We have implemented terminal scrolling!\n");
if (magic != MULTIBOOT_BOOTLOADER_MAGIC){
printf("Invalid magic number: 0x%x\n", magic);
return;
}
CheckMBT( (multiboot_info_t *) addr);
/** Test objective cpp **/
kterm_writestring("Testing C++ object support\n");
auto testObject = Test();
testObject.printMe();
multiboot_info_t* mbt = (multiboot_info_t*) addr;
/** Setup the MMU **/
kterm_writestring("Starting MMU...\n");
auto mmu = MMU();
mmu.enable();
kterm_writestring("MMU enabled!\n");
/* Are mmap_* valid? */
if (CHECK_FLAG(mbt->flags, 6)){
PhysicalMemoryManager_initialise( mbt->mmap_addr, GB2/* Seriously dangerous hardcoded memory value*/);
PhysicalMemoryManager_initialise_available_regions(mbt->mmap_addr, mbt->mmap_addr + mbt->mmap_length);
PhysicalMemoryManager_deinitialise_kernel();
extern uint8_t* kernel_begin;
extern uint8_t* kernel_end;
printf("Kernel MemoryMap:\n");
printf("kernel: 0x%x - 0x%x\n", &kernel_begin , &kernel_end);
}
initGDT();
kernel_main();
}
int memcmp( const void* ptr1, const void* ptr2, size_t num)
{
const unsigned char * cs = (const unsigned char*) ptr1;
const unsigned char * ct = (const unsigned char*) ptr2;
for (int i = 0 ; i < num ; i++, cs++, ct++ ){
if( *cs < *ct){
return -1;
} else if( *cs > *ct){
return 1;
}
}
return 0;
}
extern "C" void kernel_main (void) {
printf("call to init serial\n");
init_serial();
print_serial("Serial port initialized!");
// Enumerate the PCI bus
PCI_Enumerate();
TestIDEController();
int devNumber = 0 ;
for ( auto device : ide_devices){
if (!device.Reserved)
continue;
printf("Device %d\n" , devNumber);
printf (" Device on Channel: (0x%x) %s\n" ,device.Channel, device.Channel == 0 ? "Primary" : "Secondary");
printf (" Device drive:(0x%x) %s\n" , device.Drive, device.Drive? "Slave" : "Master");
printf (" Device Type:(0x%x) %s\n" , device.Type, device.Type ? "ATAPI" : "ATA");
devNumber ++;
/** Lets start using the serial port for debugging .. **/
// Hopefully once we go into realmode or do something that
// cause the screen to go black.. this serial comms part will give
// some situational awareness
//Serial serialbus = Serial::init();
test_serial();
}
}
// ATAPI_DEVICE::isPacketDevice();
ATAPI_DEVICE::Identify(ATA_SECONDARY, DEVICE_DRIVE::MASTER);
while (true){
//Read time indefinetely
read_rtc();
printf( "UTC time: %02d-%02d-%02d %02d:%02d:%02d [ Formatted as YY-MM-DD h:mm:ss]\r" ,year, month, day, hour, minute, second);
delay(1000);
}
}

View File

@ -1,7 +1,40 @@
#pragma once
extern "C" {
#include "../libc/include/string.h"
#include "arch/i386/tty/kterm.h"
extern "C"{
#include "../libc/include/string.h"
}
#include "MMU.h"
#include "vga/VBE.h"
#include "tty/kterm.h"
#include "./bootloader/multiboot.h"
#include "bootcheck.h"
#include "memory/PhysicalMemoryManager.h"
#include "gdt/gdtc.h"
#include "idt/idt.h"
#include "io.h"
#include "time.h"
#include "cpu.h"
#include "serial.h"
#include "pci.h"
#include "ide/ide.h"
#include "drivers/atapi/atapiDevice.h"
#define CHECK_FLAG(flags, bit) ((flags) & (1 <<(bit)))
#define PANIC(message) { return; }
/* This needs to be moved! */
/**
* simple delay function
**/
void delay(int t){
volatile int i,j;
for(i=0;i<t;i++)
for(j=0;j<25000;j++)
asm("NOP");
}

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@ -0,0 +1,40 @@
#pragma once
#include <stddef.h>
#include <stdint.h>
inline void bitmap_set( uint32_t* map , int index )
{
map[index/32] |= (1 << (index % 32));
}
inline void bitmap_unset(uint32_t* map , int index)
{
map[index/32] &= ~(1 << (index % 32));
}
inline int bitmap_first_unset( uint32_t* map , int size)
{
uint32_t rem_bits = size % 32;
for(uint32_t i = 0; i < size/32; i++)
{
if(map[i] != 0xFFFFFFFF){
for(int j = 0; j < 32; j++){
if(!(map[i] & (1<< j))){
return (i*32) + j;
}
}
}
}
if(rem_bits){
for(uint32_t j = 0; j < rem_bits; j++){
if(!(map[size/32] & (1 << j ))){
return size + j; // Original author divided size by 32 and then multiplied it by 32 which is a net zero calculation ?!?
}
}
}
return -1;
}

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@ -6,10 +6,11 @@ ENTRY(_start)
kernel image. */
SECTIONS
{
/* Begin putting sections at 1 MiB, a conventional place for kernels to be
loaded at by the bootloader. */
. = 1M;
kernel_begin = .;
/* First put the multiboot header, as it is required to be put very early
early in the image or the bootloader won't recognize the file format.
Next we'll put the .text section. */
@ -40,4 +41,7 @@ SECTIONS
/* The compiler may produce other sections, by default it will put them in
a segment with the same name. Simply add stuff here as needed. */
kernel_end = .;
}

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@ -1,9 +1,10 @@
#include "MMU.h"
#include "PageDirectory.h"
#include <stdint.h>
void MMU::enable(){
void PageDirectory::enable(){
// https://wiki.osdev.org/Setting_Up_Paging
//set each entry to not present
int i;
for(i = 0; i < 1024; i++)
@ -33,3 +34,14 @@ void MMU::enable(){
loadPageDirectory(this->page_directory);
enablePaging();
}
/*
void IdentityPaging(uint32_t *first_pte, vaddr from, int size)
{
from = from & 0xFFFFF000; // Discard the bits we don't want
for (; size > 0; from += 4096, first_pte++)
{
*first_pte = from | 1; // makr page present.
}
}
*/

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@ -0,0 +1,28 @@
#pragma once
#include <stdint.h>
extern "C" void loadPageDirectory (uint32_t* addr );
extern "C" void enablePaging();
typedef uintptr_t address_t;
#define KB 1024
static const int MAX_PAGES = 1024 * KB; // 4GB , 4kB/page
static volatile address_t pmem_stack[MAX_PAGES];
static volatile address_t pmem_stack_top = MAX_PAGES; // top down allocation
struct page_directory_entry {};
struct page_table_entry{};
class PageDirectory {
public:
void enable ();
private:
uint32_t page_directory[1024] __attribute__((aligned(4096)));
uint32_t first_page_table[1024] __attribute__((aligned(4096)));
};

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@ -0,0 +1,38 @@
#include "PageFrameAllocator.h"
MemoryInfo memInfo {};
void mapMultibootMemoryMap( multiboot_info_t *mbt){
printf("mmap_addr = 0x%x, mmap_length = 0x%x\n",
(unsigned) mbt->mmap_addr, (unsigned) mbt->mmap_length);
multiboot_memory_map_t *mmap = (multiboot_memory_map_t*) mbt->mmap_addr;
for (; (unsigned long) mmap < mbt->mmap_addr + mbt->mmap_length; mmap = (multiboot_memory_map_t *) ((unsigned long) mmap + mmap->size + sizeof(mmap->size))){
if ( mmap->type == MULTIBOOT_MEMORY_AVAILABLE){
memInfo.memorySizeInBytes += mmap->len;
} else {
memInfo.reservedMemoryInBytes += mmap->len;
}
print_Multiboot_memory_Map(mmap);
}
uint32_t memorySizeInGiB = memInfo.memorySizeInBytes / 1073741824;
printf("Available Memory: 0x%x bytes, 0x%x GiB\n", memInfo.memorySizeInBytes, memorySizeInGiB );
printf("Reserved Memory: 0x%x bytes\n", memInfo.reservedMemoryInBytes );
}
void print_Multiboot_memory_Map(multiboot_memory_map_t* mmap){
printf(
"size = 0x%x, base_addr = 0x%x%08x, length = 0x%x%08x, type = 0x%x\n",
(unsigned) mmap->size,
(unsigned) (mmap->addr >> 32),
(unsigned) (mmap->addr & 0xffffffff),
(unsigned) (mmap->len >> 32),
(unsigned) (mmap->len & 0xffffffff),
(unsigned) mmap->type
);
}

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@ -0,0 +1,20 @@
#pragma once
#include "../arch/i386/tty/kterm.h"
#include <stdint.h>
#include "../bootloader/multiboot.h"
struct MemoryInfo{
uint32_t memorySizeInBytes = 0;
uint32_t reservedMemoryInBytes = 0;
};
extern void *kernel_begin;
extern void *kernel_end;
void print_Multiboot_memory_Map(multiboot_memory_map_t*);
void mapMultibootMemoryMap(multiboot_info_t*);

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@ -0,0 +1,118 @@
#include "PhysicalMemoryManager.h"
size_t mem_size = 0;
int used_blocks = 0;
size_t max_blocks = 0;
uint32_t* pmmap = 0;
size_t pmmap_size = 0;
void PhysicalMemoryManager_initialise(uint32_t physicalmemorymap_address, size_t size )
{
mem_size = size;
max_blocks = KB_TO_BLOCKS(mem_size);
used_blocks = max_blocks;
pmmap = (uint32_t*) physicalmemorymap_address;
if(max_blocks % BLOCKS_PER_WORD)
pmmap_size++;
memset(pmmap, 0xFF, pmmap_size);
}
void PhysicalMemoryManager_region_initialise(uint32_t base, size_t size)
{
size_t blocks = size /BLOCK_SIZE;
uint32_t align = base / BLOCK_SIZE;
for(size_t i = 0 ; i < blocks; i ++)
{
bitmap_unset(pmmap, align++);
used_blocks--;
}
bitmap_set(pmmap, 0);
}
void PhysicalMemoryManager_region_deinitialise(uint32_t base, size_t size )
{
size_t blocks = size / BLOCK_SIZE;
uint32_t align = base / BLOCK_SIZE;
for(size_t i = 0 ; i < blocks; i++ )
{
bitmap_set(pmmap, align++);
used_blocks++;
}
}
void PhysicalMemoryManager_initialise_available_regions(uint32_t mmap_, uint32_t mmap_end_)
{
multiboot_memory_map_t *mmap = (multiboot_memory_map_t*)mmap_;
multiboot_memory_map_t *mmap_end= (multiboot_memory_map_t*) mmap_end_;
for(int i = 0; mmap < mmap_end ; mmap++, i++)
{
if(mmap->type == MULTIBOOT_MEMORY_AVAILABLE)
{
PhysicalMemoryManager_region_initialise((uint32_t) mmap->addr, (size_t) mmap->len);
}
}
}
void PhysicalMemoryManager_deinitialise_kernel()
{
extern uint8_t kernel_begin;
extern uint8_t kernel_end;
size_t kernel_size = (size_t) &kernel_end - (size_t) &kernel_begin;
uint32_t pmmap_size_aligned = pmmap_size;
if(!IS_ALIGNED(pmmap_size_aligned, BLOCK_SIZE))
{
pmmap_size_aligned = ALIGN(pmmap_size_aligned, BLOCK_SIZE);
}
PhysicalMemoryManager_region_deinitialise((uint32_t) &kernel_begin, kernel_size);
PhysicalMemoryManager_region_deinitialise((uint32_t) &kernel_end, pmmap_size_aligned);
}
void* PhysicalMemoryManager_allocate_block()
{
if(used_blocks - max_blocks <= 0)
{
return 0;
}
int p_index = bitmap_first_unset(pmmap, p_index );
if(p_index == -1){
return 0;
}
bitmap_set(pmmap, p_index);
used_blocks++;
return (void*) (BLOCK_SIZE * p_index);
}
void PhysicalMemoryManager_free_block(void* p){
if(p==0){
return ;
}
uint32_t p_addr = (uint32_t) p;
int index = p_addr / BLOCK_SIZE;
bitmap_unset(pmmap, index);
used_blocks--;
}

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@ -0,0 +1,34 @@
#pragma once
#include "../bootloader/multiboot.h"
#include <stdint.h>
#include <stddef.h>
#include "../../libc/include/mem.h"
#include "../kstructures/bitmap.h"
#define BLOCK_SIZE 4092
#define BLOCKS_PER_WORD 32
#define KB_TO_BLOCKS(x) (((x) * 1024 ) / BLOCK_SIZE)
#define IS_ALIGNED(addr, align) !((addr) & ~((align) - 1))
#define ALIGN(addr, align) (((addr) & ~((align) - 1 )) + (align))
extern void PhysicalMemoryManager_initialise(uint32_t, size_t);
extern void PhysicalMemoryManager_region_initialise(uint32_t, size_t);
extern void PhysicalMemoryManager_region_deinitialise(uint32_t,size_t);
extern void PhysicalMemoryManager_initialise_available_regions(uint32_t, uint32_t);
extern void PhysicalMemoryManager_deinitialise_kernel();
extern void* PhysicalMemoryManager_allocate_block();
extern void PhysicalMemoryManager_free_block(void* p);
extern size_t mem_size;
extern int used_blocks;
extern size_t max_blocks;
extern uint32_t* pmmap;
extern size_t pmmap_size ;

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@ -0,0 +1,33 @@
#pragma once
/**
* We'll need something to this effect to allocate memory in the kernel
* this will hopefully someday implement a full slab allocator
**/
enum SlabState {
empty,
partial,
full
};
class CacheSlab {
const int SlabSize = 4000;
void* start = 0x0;
};
class Allocator {
public:
Allocator();
~Allocator();
void* kmalloc( int size );
void kfree (void* address);
private:
CacheSlab** _cache;
};

20
src/kernel/paging.s Normal file
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@ -0,0 +1,20 @@
.globl enablePaging
enablePaging:
push %ebp
mov %esp, %ebp
mov %cr0, %eax
or $0x80000000, %eax
mov %eax, %cr0
mov %ebp, %esp
pop %ebp
ret
.globl loadPageDirectory
loadPageDirectory:
push %ebp
mov %esp, %ebp
mov 8(%esp), %eax
mov %eax, %cr3
mov %ebp, %esp
pop %ebp
ret

247
src/kernel/pci.cpp Normal file
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@ -0,0 +1,247 @@
#include "pci.h"
#define PCI_BUS_ADDR_SHIFT 16
#define PCI_DEVICE_ADDR_SHIFT 11
#define PCI_FUNCTION_ADDR_SHIFT 8
#define PCI_ENABLE_ADDR_SHIFT 31
const char* GetClassCodeName (uint64_t ClassCode ) {
switch (ClassCode)
{
case 0x0 :
return "Unclassified";
break;
case 0x1:
return "Mass Storage Controller";
break;
case 0x2:
return "Network Controller";
break;
case 0x3:
return "Display Controller";
break;
case 0x4:
return "Multimedia Controller";
break;
case 0x5:
return "Memory Controller";
break;
case 0x6:
return "Bridge";
break;
case 0x7 :
return "Simple Communication Controller";
break;
case 0x8:
return "Base System Peripheral";
break;
case 0x9:
return "Input Device Controller";
break;
case 0xA:
return "Docking station";
break;
case 0xB:
return "Processor";
break;
case 0xC:
return "Serial Bus Controller";
break;
case 0xD:
return "Wireless Controller";
break;
case 0xE:
return "Intelligent Controller";
break;
case 0xF:
return "Satellite Communication Controller";
break;
case 0x10:
return "Encryption Controller";
break;
case 0x11:
return "Signal Processing Controller";
break;
case 0x12:
return "Processing Accelerator";
break;
case 0x13:
return "Non-Essential Instrumentation";
break;
default:
return "Unknown";
break;
}
}
const char* getVendor( uint32_t VendorID){
switch (VendorID)
{
case 0x8086:
return "Intel Corporation";
break;
case 0x10DE:
return "NVIDIA Corporation";
break;
case 0x1022:
return "Advanced Micro Devices, Inc.[AMD]";
break;
case 0x1002:
return "Advanced Micor Devices, Inc.[AMD/ATI]";
break;
default:
return "Vendor Unkown";
break;
}
}
uint32_t ConfigReadWord ( PCIBusAddress& PCIDeviceAddress , uint8_t offset){
outl(CONFIG_ADDRESS , PCIDeviceAddress.getAddress() | offset );
return inl(CONFIG_DATA);
}
uint32_t ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offset){
uint32_t address;
address = (uint32_t) (
((uint32_t) 1 << PCI_ENABLE_ADDR_SHIFT) |
((uint32_t)bus << PCI_BUS_ADDR_SHIFT) |
((uint32_t)device << PCI_DEVICE_ADDR_SHIFT) |
((uint32_t)func << PCI_FUNCTION_ADDR_SHIFT) |
offset );
outl(CONFIG_ADDRESS, address);
return inl(CONFIG_DATA);
}
uint8_t GetHeaderType( PCIBusAddress& PCIDeviceAddress ){
uint32_t header_information = ConfigReadWord(PCIDeviceAddress , 0xC);
return (uint8_t) (
((header_information >> 16) //Get higher half
& 0x00FF) // Select the last two bytes
& 0x7F ); // Mask bit 7 as it indicates if the device is a mulit function device!
}
uint16_t GetClassCodes( PCIBusAddress& PCIDeviceAddress ){
uint32_t classcodes = ConfigReadWord(PCIDeviceAddress, 0x8);
return (uint16_t)((uint32_t)classcodes >> 16);
}
bool IsMultiFunctionDevice(PCIBusAddress& PCIDeviceAddress){
uint32_t header_information = ConfigReadWord(PCIDeviceAddress, 0xC);
return (((header_information>>16)
& 0x80)
>> 7 );
}
void PrintPCIDeviceInfo (PCIBusAddress& PCIDeviceAddress)
{
uint32_t DeviceID = (GetDevice(PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function) >> 16);
uint32_t VendorID = GetDevice(PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function) & 0xFFFF;
printf("Device found!\n");
printf("Bus: %d, Device: %d, function: %d \n", PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function);
printf("DeviceID: 0x%x, Vendor: %s\n",
DeviceID
, getVendor(VendorID) );
uint8_t header_type = GetHeaderType(PCIDeviceAddress);
printf( "Header type: 0x%x\n", header_type);
uint16_t deviceClasses = GetClassCodes(PCIDeviceAddress);
printf("class: %s, subClass: %d\n\n", GetClassCodeName((deviceClasses >>8)), deviceClasses & 0xFF);
}
void PCI_Enumerate(){
int devicesFound = 0;
// loop through all possible busses, devices and their functions;
for( int bus = 0 ; bus < 256 ; bus++)
{
for(int device = 0; device < 32 ; device ++)
{
int function = 0;
//uint64_t DeviceIdentify = ConfigReadWord(bus, device, function,0x0);
uint32_t DeviceID = GetDevice(bus, device, function) >> 16;
if( DeviceID != 0xFFFF){
PCIBusAddress busAddress =
PCIBusAddress{bus, device, function };
PrintPCIDeviceInfo(busAddress);
// iterate over the functions if it is a multi function device!
if( IsMultiFunctionDevice(busAddress) ){
printf("Multi function device! \n");
printf("Check remaining Functions\n");
for ( function = 1 ; function < 8; function++)
{
uint32_t DeviceID = GetDevice(bus, device, function) >> 16;
if( DeviceID != 0xFFFF){
PCIBusAddress busAddress2 = PCIBusAddress{bus, device, function};
PrintPCIDeviceInfo(busAddress2);
devicesFound++;
}
}
}
devicesFound++;
}
}
}
printf("Found %d PCI devices!\n", devicesFound);
}
uint8_t GetProgIF (PCIBusAddress& PCIDeviceAddress){
uint32_t data = ConfigReadWord(PCIDeviceAddress, 0x8);
return ((data >> 8) & 0xFF);
}
uint32_t ReadBAR ( PCIBusAddress& PCIDeviceAddress, int bar_number){
int offsetToBar = 0x10 + (bar_number* 0x4);
return ConfigReadWord(PCIDeviceAddress, offsetToBar);
}

38
src/kernel/pci.h Normal file
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@ -0,0 +1,38 @@
#pragma once
#include <stdint.h>
#include "io.h"
#include "tty/kterm.h"
#include "pci/pciDevice.h"
// Configuration Space Access Mechanism #1
#define CONFIG_ADDRESS 0xCF8 // Configuration adress that is to be accessed
#define CONFIG_DATA 0xCFC // Will do the actual configuration operation
extern const char* ClassCodeTable [0x13];
// Note: this could be used to make the api for receiving PCI class codes a bit
// nicer.
struct ClassCodes {
uint8_t ClassCode;
uint8_t DeviceClass;
}__attribute__((packed));
uint32_t ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offset);
uint32_t ConfigReadWord ( PCIBusAddress& PCIDeviceAddress , uint8_t offset);
inline uint64_t GetDevice (int bus, int device, int function ){
return ConfigReadWord(bus, device, function,0x0);
}
uint8_t GetHeaderType( PCIBusAddress& PCIDeviceAddress );
uint16_t GetClassCodes( PCIBusAddress& PICDeviceAddress );
const char* getVendor( uint64_t VendorID);
const char* GetClassCodeName (uint64_t ClassCode );
uint8_t GetProgIF (PCIBusAddress& PCIDeviceAddress);
void PCI_Enumerate();
uint32_t ReadBAR ( PCIBusAddress& PCIDeviceAddress, int bar_number);

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@ -0,0 +1,7 @@
#include "pciDevice.h"
// NOTE: we would really like to return a pointer
// to the newly created PCIBusAddress struct;
PCIBusAddress const PCIDevice::PCIAddress(){
return PCIBusAddress{bus ,device, function};
}

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@ -0,0 +1,54 @@
#pragma once
#include <stdint.h>
/*
* PCI devices API
*/
struct PCIBusAddress{
int bus ;
int device ;
int function;
uint32_t getAddress( ){
return ((uint32_t) 1 << 31) |
((uint32_t) bus << 16) |
((uint32_t) device << 11)|
((uint32_t) function << 8) |
0x0000;
};
};
class PCIDevice {
public :
PCIDevice (PCIBusAddress* , int );
~PCIDevice();
PCIBusAddress const PCIAddress();
inline const char* getDeviceString(){
return "Not implemented"; //GetClassCodeName(deviceclass);
}
inline const char* getVendorString(){
return "Not implemented"; // getVendor(VendorID);
}
inline void setVendorID (uint16_t id) {
this->VendorID = id;
}
private:
int bus;
int device;
int function;
uint16_t VendorID;
uint16_t DeviceID;
uint8_t deviceclass;
uint8_t devicesubclass;
int headerType;
};

62
src/kernel/pic/pic.cpp Normal file
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@ -0,0 +1,62 @@
#include "pic.h"
extern "C" void PIC_sendEOI (unsigned char irq){
if(irq >= 8)
outb(PIC2_COMMAND, PIC_EOI);
outb(PIC1_COMMAND, PIC_EOI);
}
/* Helper func */
static uint16_t __pic_get_irq_reg(int ocw3)
{
/* OCW3 to PIC CMD to get the register values. PIC2 is chained, and
* represents IRQs 8-15. PIC1 is IRQs 0-7, with 2 being the chain */
outb(PIC1_COMMAND, ocw3);
outb(PIC2_COMMAND, ocw3);
return (inb(PIC2_COMMAND) << 8) | inb(PIC1_COMMAND);
}
/* Returns the combined value of the cascaded PICs irq request register */
uint16_t pic_get_irr(void)
{
return __pic_get_irq_reg(PIC_READ_IRR);
}
/* Returns the combined value of the cascaded PICs in-service register */
uint16_t pic_get_isr(void)
{
return __pic_get_irq_reg(PIC_READ_ISR);
}
void PIC_remap (int offset1, int offset2 ){
unsigned char a1, a2;
a1 = inb(PIC1_DATA);
a2 = inb(PIC2_DATA);
// Start initialization
outb(PIC1_COMMAND, ICW1_INIT | ICW1_ICW4);
io_wait();
outb(PIC2_COMMAND, ICW1_INIT | ICW1_ICW4);
io_wait();
outb(PIC1_DATA, offset1);
io_wait();
outb(PIC2_DATA, offset2);
io_wait();
outb(PIC1_DATA, 4);
io_wait();
outb(PIC2_DATA, 2);
io_wait();
outb(PIC1_DATA, ICW4_8086);
io_wait();
outb(PIC2_DATA, ICW4_8086);
io_wait();
outb(PIC1_DATA, a1);
outb(PIC2_DATA, a2);
}

57
src/kernel/pic/pic.h Normal file
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@ -0,0 +1,57 @@
#pragma once
#include "../io.h"
#define PIC1 0x20 /* IO base address for master PIC */
#define PIC2 0xA0 /* IO base address for slave PIC */
#define PIC1_COMMAND PIC1
#define PIC1_DATA (PIC1+1)
#define PIC2_COMMAND PIC2
#define PIC2_DATA (PIC2+1)
#define ICW1_ICW4 0x01 /* ICW4 (not) needed */
#define ICW1_SINGLE 0x02 /* Single (cascade) mode */
#define ICW1_INTERVAL4 0x04 /* Call address interval 4 (8) */
#define ICW1_LEVEL 0x08 /* Level triggered (edge) mode */
#define ICW1_INIT 0x10 /* Initialization - required! */
#define ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */
#define ICW4_AUTO 0x02 /* Auto (normal) EOI */
#define ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */
#define ICW4_BUF_MASTER 0x0C /* Buffered mode/master */
#define ICW4_SFNM 0x10 /* Special fully nested (not) */
#define PIC_EOI 0x20
#define PIC_READ_IRR 0x0a /* OCW3 irq ready next CMD read */
#define PIC_READ_ISR 0x0b /* OCW3 irq service next CMD read */
extern "C"{
extern void irq0 ();
extern void irq1 ();
extern void irq2 ();
extern void irq3 ();
extern void irq4 ();
extern void irq5 ();
extern void irq6 ();
extern void irq7 ();
extern void irq8 ();
extern void irq9 ();
extern void irq10 ();
extern void irq11 ();
extern void irq12 ();
extern void irq13 ();
extern void irq14 ();
extern void irq15 ();
void PIC_sendEOI (unsigned char irq);
}
//static uint16_t __pic_get_irq_reg(int ocw3);
uint16_t pic_get_irr(void);
uint16_t pic_get_isr(void);
void PIC_remap (int offset1, int offset2 );

70
src/kernel/serial.h Normal file
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@ -0,0 +1,70 @@
#pragma once
#include "tty/kterm.h"
#include "io.h"
#define PORT 0x3f8
static int init_serial() {
outb(PORT + 1, 0x00); // Disable all interrupts
outb(PORT + 3, 0x80); // Enable DLAB (set baud rate divisor)
outb(PORT + 0, 0x03); // Set divisor to 3 (lo byte) 38400 baud
outb(PORT + 1, 0x00); // (hi byte)
outb(PORT + 3, 0x03); // 8 bits, no parity, one stop bit
outb(PORT + 2, 0xC7); // Enable FIFO, clear them, with 14-byte threshold
outb(PORT + 4, 0x0B); // IRQs enabled, RTS/DSR set
outb(PORT + 4, 0x1E); // Set in loopback mode, test the serial chip
outb(PORT + 0, 0xAE); // Test serial chip (send byte 0xAE and check if serial returns same byte)
// Check if serial is faulty (i.e: not same byte as sent)
if(inb(PORT + 0) != 0xAE) {
return 1;
}
// If serial is not faulty set it in normal operation mode
// (not-loopback with IRQs enabled and OUT#1 and OUT#2 bits enabled)
outb(PORT + 4, 0x0F);
return 0;
}
int is_transmit_empty() {
return inb(PORT + 5) & 0x20;
}
void write_serial(char a) {
while (is_transmit_empty() == 0);
outb(PORT,a);
}
int serial_received() {
return inb(PORT + 5) & 1;
}
char read_serial() {
while (serial_received() == 0);
return inb(PORT);
}
void print_serial(const char* string ){
for(size_t i = 0; i < strlen(string); i ++){
write_serial(string[i]);
}
}
void test_serial(){
/** Serial test **/
kterm_writestring("Writing to COM1 serial port:");
init_serial();
write_serial('A');
write_serial('B');
write_serial('C');
write_serial('D');
write_serial('E');
char Character_received = read_serial();
kterm_writestring("\n");
kterm_writestring("received from COM 1: \n");
kterm_put(Character_received);
kterm_writestring("\n");
}

153
src/kernel/time.h Normal file
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#define CURRENT_YEAR 2021 // Change this each year!
int century_register = 0x00; // Set by ACPI table parsing code if possible
unsigned char second;
unsigned char minute;
unsigned char hour;
unsigned char day;
unsigned char month;
unsigned int year;
enum {
cmos_address = 0x70,
cmos_data = 0x71
};
int get_update_in_progress_flag() {
outb(cmos_address, 0x0A);
return (inb(cmos_data) & 0x80);
}
unsigned char get_RTC_register(int reg) {
outb(cmos_address, reg);
return inb(cmos_data);
}
void read_rtc() {
unsigned char century;
unsigned char last_second;
unsigned char last_minute;
unsigned char last_hour;
unsigned char last_day;
unsigned char last_month;
unsigned char last_year;
unsigned char last_century;
unsigned char registerB;
// Note: This uses the "read registers until you get the same values twice in a row" technique
// to avoid getting dodgy/inconsistent values due to RTC updates
while (get_update_in_progress_flag()); // Make sure an update isn't in progress
second = get_RTC_register(0x00);
minute = get_RTC_register(0x02);
hour = get_RTC_register(0x04);
day = get_RTC_register(0x07);
month = get_RTC_register(0x08);
year = get_RTC_register(0x09);
if(century_register != 0) {
century = get_RTC_register(century_register);
} else {
century = 21;
}
do {
last_second = second;
last_minute = minute;
last_hour = hour;
last_day = day;
last_month = month;
last_year = year;
last_century = century;
while (get_update_in_progress_flag()); // Make sure an update isn't in progress
second = get_RTC_register(0x00);
minute = get_RTC_register(0x02);
hour = get_RTC_register(0x04);
day = get_RTC_register(0x07);
month = get_RTC_register(0x08);
year = get_RTC_register(0x09);
if(century_register != 0) {
century = get_RTC_register(century_register);
}
} while( (last_second != second) || (last_minute != minute) || (last_hour != hour) ||
(last_day != day) || (last_month != month) || (last_year != year) ||
(last_century != century) );
registerB = get_RTC_register(0x0B);
// Convert BCD to binary values if necessary
if (!(registerB & 0x04)) {
second = (second & 0x0F) + ((second / 16) * 10);
minute = (minute & 0x0F) + ((minute / 16) * 10);
hour = ( (hour & 0x0F) + (((hour & 0x70) / 16) * 10) ) | (hour & 0x80);
day = (day & 0x0F) + ((day / 16) * 10);
month = (month & 0x0F) + ((month / 16) * 10);
year = (year & 0x0F) + ((year / 16) * 10);
if(century_register != 0) {
century = (century & 0x0F) + ((century / 16) * 10);
}
}
// Convert 12 hour clock to 24 hour clock if necessary
if (!(registerB & 0x02) && (hour & 0x80)) {
hour = ((hour & 0x7F) + 12) % 24;
}
// Calculate the full (4-digit) year
if(century_register != 0) {
year += century * 100;
} else {
year += (CURRENT_YEAR / 100) * 100;
if(year < CURRENT_YEAR) year += 100;
}
}
/*
void ReadFromCMOS(unsigned char array[])
{
unsigned char tvalue, index;
for (index = 0; index < 128; index++)
{
asm(
"cli\n\t" // Disable interrupts
"mov al, index\n\t" // Move index address
// since the 0x80 bit of al is not set, NMI is active
"out 0x70,al\n\t" // Copy address to CMOS register
// some kind of real delay here is probably best
"in al,0x71\n\t" // Fetch 1 byte to al
"sti\n\t" // Enable interrupts
"mov tvalue,al\n\t");
array[index] = tvalue;
}
}
*/
/*
void WriteTOCMOS(unsigned char array[])
{
unsigned char index;
for(index = 0; index < 128; index++)
{
unsigned char tvalue = array[index];
asm("cli\n\t" // Clear interrupts
"mov al,index\n\t" // move index address
"out 0x70,al\n\t" // copy address to CMOS register
// some kind of real delay here is probably best
"mov al,tvalue\n\t" // move value to al
"out 0x71,al\n\t" // write 1 byte to CMOS
"sti\n\\t" ); // Enable interrupts
}
}
*/

27
src/kernel/timer.cpp Normal file
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#include "timer.h"
uint32_t tick = 0;
static void timer_callback (registers_t regs ){
tick ++ ;
kterm_writestring ("tick passed!");
}
void init_timer (uint32_t frequency){
// register timer callback
uint32_t divisor = 1193180 / frequency;
// Send the commmand byte
outb(0x43, 0x36);
// Divisor has to be sent byt-wise , so will send lower then upper bytes
uint8_t low = (uint8_t) (divisor & 0xFF);
uint8_t high = (uint8_t) ((divisor >> 8) & 0xFF);
outb(0x40, low);
outb(0x40, high);
}

6
src/kernel/timer.h Normal file
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#pragma once
#include <stddef.h>
#include <stdint.h>
void init_timer (uint32_t frequency);

234
src/kernel/tty/kterm.cpp Normal file
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#include "kterm.h"
static const size_t VGA_WIDTH = 80;
static const size_t VGA_HEIGHT = 25;
size_t kterm_row;
size_t kterm_column;
uint8_t kterm_color;
uint16_t* kterm_buffer;
static inline uint8_t vga_entry_color( enum vga_color fg, enum vga_color bg) {
return fg | bg << 4;
}
static inline uint16_t vga_entry (unsigned char uc, uint8_t color) {
return (uint16_t) uc | (uint16_t) color << 8;
}
void kterm_init () {
kterm_row = 0;
kterm_column = 0;
kterm_color = vga_entry_color ( VGA_COLOR_LIGHT_GREY , VGA_COLOR_BLACK);
kterm_buffer = (uint16_t*) 0xB8000;
for (size_t y = 0; y < VGA_HEIGHT; y++ ){
for( size_t x = 0; x < VGA_WIDTH; x++){
const size_t index = y * VGA_WIDTH + x;
kterm_buffer[index] = vga_entry(' ', kterm_color);
}
}
}
void kterm_resetcolor(){
kterm_color = vga_entry_color ( VGA_COLOR_LIGHT_GREY , VGA_COLOR_BLACK);
}
void kterm_setcolor(uint8_t color){
kterm_color = color;
}
void kterm_putat (char c, uint8_t color, size_t x, size_t y ) {
const size_t index = y * VGA_WIDTH + x;
kterm_buffer[index] = vga_entry(c, color);
}
void enable_cursor (uint8_t start_cursor , uint8_t end_cursor ){
outb(0x3D4, 0x0A);
outb(0x3D5, (inb(0x3D5) & 0xC0) | start_cursor);
outb(0x3D4, 0x0B);
outb(0x3D5, (inb(0x3D5) & 0xE0) | end_cursor);
}
void disable_cursor()
{
outb(0x3D4, 0x0A);
outb(0x3D5, 0x20);
}
void update_cursor(int x, int y){
uint16_t pos = y * VGA_WIDTH + x;
outb(0x3D4, 0x0F);
outb(0x3D5, (uint8_t) (pos & 0xFF));
outb(0x3D4, 0x0E);
outb(0x3D5, (uint8_t) ((pos >> 8) & 0xFF));
}
uint16_t get_cursor_position(){
uint16_t pos = 0;
outb(0x3D4, 0x0F);
pos |= inb(0x3D5);
outb(0x3D4, 0x0E);
pos |= ((uint16_t) inb(0x3D5)) << 8;
return pos;
}
int get_cursor_x (uint16_t cursor_pos) {
return cursor_pos % VGA_WIDTH;
}
int get_cursor_y (uint16_t cursor_pos ) {
return cursor_pos / VGA_WIDTH;
}
/**
* With the help from:
* https://whiteheadsoftware.dev/operating-systems-development-for-dummies/
**/
void kterm_scrollup(){
size_t i ;
for(i=0; i < (VGA_WIDTH * VGA_HEIGHT - VGA_WIDTH); i++)
kterm_buffer[i] = kterm_buffer[i+VGA_WIDTH];
for( i=0; i< VGA_WIDTH; i++)
kterm_buffer[(VGA_HEIGHT -1) * VGA_WIDTH + i ] = vga_entry(' ', kterm_color);
}
void kterm_put (char c) {
if(++kterm_column == VGA_WIDTH || c == '\n' ) {
update_cursor(kterm_column , kterm_row);
kterm_column = 0;
if(kterm_row == VGA_HEIGHT-1 ) {
kterm_scrollup();
} else {
kterm_row ++;
}
}
if ( c == '\r'){
kterm_column = 0;
return;
}
if(c == '\n') return;
kterm_putat ( c, kterm_color, kterm_column, kterm_row);
}
void kterm_write(const char* data, size_t size) {
for(size_t i = 0; i < size; i++){
kterm_put(data[i]);
}
}
void kterm_writestring(const char* data ){
// AS_KERNEL();
kterm_write(data, strlen(data));
}
static void itoa (char *buf, int base, int d) {
char *p = buf;
char *p1, *p2;
unsigned long ud = d;
int divisor = 10;
if ( base == 'd' && d < 0){
*p++ = '-';
buf++;
ud = -d;
} else if (base == 'x'){
divisor = 16;
}
do {
int remainder = ud % divisor;
*p++ = (remainder < 10 ) ? remainder + '0' : remainder + 'a' -10;
} while(ud /= divisor);
/*terminate buf*/
*p =0;
p1 = buf;
p2 = p -1;
while (p1 < p2)
{
char tmp = *p1;
*p1 = *p2;
*p2 = tmp;
p1++;
p2--;
}
}
void printf ( const char *format, ...) {
char **arg = (char **)&format;
int c;
char buf[20];
arg++;
while ((c = *format++) != 0){
if( c != '%')
kterm_put(c);
else{
char *p, *p2;
int pad0 = 0, pad = 0;
c = *format++;
if(c =='0'){
pad0 = 1;
c = *format++;
}
if ( c >= '0' && c <= '9'){
pad = c - '0';
c = *format++;
}
switch (c)
{
case 'd':
case 'u':
case 'x':
itoa(buf, c, *((int *) arg++));
p = buf;
goto string;
break;
case 's':
p = *arg++;
if(!p)
p = "(null)";
string:
for (p2 = p; *p2; p2++);
for (; p2 < p + pad; p2++)
kterm_put(pad0 ? '0': ' ');
while (*p)
kterm_put(*p++);
break;
default:
kterm_put(*((int *)arg++));
break;
}
}
}
}

46
src/kernel/tty/kterm.h Normal file
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#pragma once
#include <stdint.h>
#include <stddef.h>
#include <stdint.h>
#include <stdbool.h>
#include "../vga/colors.h"
#include "../io.h"
extern "C"{
#include "./../../libc/include/string.h"
}
void kterm_init();
/* Kernel terminal - Colour functions*/
void kterm_resetcolor();
void kterm_setcolor(uint8_t);
/* Kernel terminal - Printing function */
void kterm_putat(char, uint8_t, size_t, size_t);
void kterm_put(char);
void kterm_write(const char*, size_t);
void kterm_writestring(const char*);
void kterm_scrollup();
/* Kernel terminal - Cursor functions */
void enable_cursor (uint8_t start_cursor , uint8_t end_cursor );
void disable_cursor();
void update_cursor(int x, int y);
uint16_t get_cursor_position();
int get_cursor_x (uint16_t cursor_pos);
int get_cursor_y (uint16_t cursor_pos);
void printf ( const char *format, ...);
//static void itoa (char *buf, int base, int d);
#define KernelTag "[Kernel]: "
#define AS_KERNEL() ( kterm_setcolor(VGA_COLOR_LIGHT_BLUE),\
kterm_write(KernelTag, 10 ), \
kterm_resetcolor())

41
src/kernel/vga/VBE.h Normal file
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#define VBE_DISPI_IOPORT_INDEX 0x01CE
#define VBE_DISPI_IOPORT_DATA 0x01CF
/* VBE index values*/
#define VBE_DISPI_INDEX_ID 0x0
#define VBE_DISPI_INDEX_XRES 0x1
#define VBE_DISPI_INDEX_YRES 0x2
#define VBE_DISPI_INDEX_BPP 0x3
#define VBE_DISPI_INDEX_ENABLE 0x4
#define VBE_DISPI_INDEX_BANK 0x5
#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
#define VBE_DISPI_INDEX_X_OFFSET 0x8
#define VBE_DISPI_INDEX_Y_OFFSET 0x9
/* BGA Version */
#define VBE_DISPI_ID5 0xB0C5
#define VBE_DISPI_ID4 0xB0C3
#define VBE_DISPI_ID3 0xB0C2
#define VBE_DISPI_ID2 0xB0C1
#define VBE_DISPI_ID1 0xB0C0
/* BGA BIT DEPTH */
#define VBE_DISPI_BPP_4 0x04
#define VBE_DISPI_BPP_8 0x08
#define VBE_DISPI_BPP_15 0x0F
#define VBE_DISPI_BPP_16 0x10
#define VBE_DISPI_BPP_24 0x18
#define VBE_DISPI_BPP_32 0x20
/*unsigned short BGAReadRegister(unsigned short IndexValue){
// outpw(VBE_DISPI_IOPORT_INDEX, IndexValue);
// return inpw (VBE_DISPI_IOPORT_DATA);
}
int BGAIsAvailable (){
return (BGAReadRegister(VBE_DISPI_INDEX_ID) == VBE_DISPI_ID5);
}*/

8
src/libc/include/mem.h Normal file
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inline void* memset (void* ptr, int value, size_t num){
for( int i = 0; i < num; i++ )
{
int* data = (int*)ptr+ i;
*data = value;
}
return ptr;
}

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#include "string.h"
size_t strlen(const char* str) {
size_t len = 0;
while(str[len]){
len++;
}
return len;
}

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@ -1,8 +1,3 @@
#pragma once
#include <stddef.h>
size_t strlen(const char* str){
size_t len = 0;
while(str[len]){
len++;
}
return len;
}
size_t strlen(const char* str);