Started the base implementation for PCI IDE drivers
parent
72438ae70d
commit
5a68f77b33
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#pragma once
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#include <stdint.h>
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#include "../pci/pciDevice.h"
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#include "../tty/kterm.h"
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#include "ideCommands.h"
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#include "sampleIDE.h"
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#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
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inline void CheckProgIF(uint8_t ProgIF){
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if( IS_BIT_SET(ProgIF, 0) ) // Is the 0th bit set
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{
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printf ("Primary Channel is in PCI native mode\n");
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} else{
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printf("Primary Channel is in Compatibility mode\n");
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}
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if( IS_BIT_SET(ProgIF, 1)){
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printf("Bit 0 can be modified\n");
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}else{
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printf("Bit 0 cannot be modified\n");
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}
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if( IS_BIT_SET(ProgIF, 2)){
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printf("Secondary channel is in PCI native mode\n");
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}else{
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printf("Secondary channel is in Compatibility mode\n");
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}
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if( IS_BIT_SET(ProgIF, 3)){
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printf("Bit 2 can be modified\n");
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}else{
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printf("Bit 2 cannot be modified\n");
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}
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if( IS_BIT_SET(ProgIF , 7)){
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printf("This is a bus master IDE Controller\n");
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} else{
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printf("This controller doesn't support DMA!\n");
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}
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}
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inline void TestIDEController(){
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// Do stuff
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printf("Testing IDE controllers\n");
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// NOTE: Testing done with a hard coded known PCI addres
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// Of an intel PIIX3 IDE Controller
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int bus = 0;
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int device =1 , function = 1;
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PCIBusAddress IDEControllerPCIAddress = PCIBusAddress{bus,device, function};
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uint8_t ProgIF = GetProgIF(IDEControllerPCIAddress);
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printf( "ProgIF: 0x%x\n" ,ProgIF);
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//CheckProgIF(ProgIF);
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// For this test will just assume all bits are set
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// the CheckProgIF can check but on the test machine all bits are set anyways
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uint32_t BAR0,BAR1,BAR2,BAR3, BAR4;
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BAR0 = ReadBAR(IDEControllerPCIAddress, 0);
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BAR1 = ReadBAR(IDEControllerPCIAddress, 1);
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BAR2 = ReadBAR(IDEControllerPCIAddress, 2);
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BAR3 = ReadBAR(IDEControllerPCIAddress, 3);
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BAR4 = ReadBAR(IDEControllerPCIAddress, 4);
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// All bars are return 0xffffff for some as of yet mysterious reason!
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printf( "BAR 0: 0x%x\n", BAR0);
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printf( "BAR 1: 0x%x\n", BAR1);
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printf( "BAR 2: 0x%x\n", BAR2);
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printf( "BAR 3: 0x%x\n", BAR3);
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printf( "BAR 4: 0x%x\n", BAR4);
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init_IDE(BAR0, BAR1, BAR2, BAR3, BAR4);
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// Read Something from disc
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unsigned int maxByteCount = 20 ;
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void* MDA_buffer = (void*)0xC0000000;
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}
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#pragma once
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// Commands
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#define ATA_CMD_READ_PIO 0x20
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#define ATA_CMD_READ_PIO_EXT 0x24
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#define ATA_CMD_READ_DMA 0xC8
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#define ATA_CMD_READ_DMA_EXT 0x25
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#define ATA_CMD_WRITE_PIO 0x30
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#define ATA_CMD_WRITE_PIO_EXT 0x34
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#define ATA_CMD_WRITE_DMA 0xCA
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#define ATA_CMD_WRITE_DMA_EXT 0x35
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#define ATA_CMD_CACHE_FLUSH 0xE7
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#define ATA_CMD_CACHE_FLUSH_EXT 0xEA
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#define ATA_CMD_PACKET 0xA0
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#define ATA_CMD_IDENTIFY_PACKET 0xA1
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#define ATA_CMD_IDENTIFY 0xEC
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#define ATAPI_CMD_READ 0xA8
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#define ATAPI_CMD_EJECT 0x1B
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#define ATA_IDENT_DEVICETYPE 0
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#define ATA_IDENT_CYLINDERS 2
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#define ATA_IDENT_HEADS 6
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#define ATA_IDENT_SECTORS 12
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#define ATA_IDENT_SERIAL 20
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#define ATA_IDENT_MODEL 54
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#define ATA_IDENT_CAPABILITIES 98
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#define ATA_IDENT_FIELDVALID 106
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#define ATA_IDENT_MAX_LBA 120
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#define ATA_IDENT_COMMANDSETS 164
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#define ATA_IDENT_MAX_LBA_EXT 200
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#define IDE_ATA 0x00
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#define IDE_ATAPI 0x01
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#define ATA_MASTER 0x00
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#define ATA_SLAVE 0x01
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#define ATA_REG_DATA 0x00
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#define ATA_REG_ERROR 0x01
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#define ATA_REG_FEATURES 0x01
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#define ATA_REG_SECCOUNT0 0x02
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#define ATA_REG_LBA0 0x03
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#define ATA_REG_LBA1 0x04
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#define ATA_REG_LBA2 0x05
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#define ATA_REG_HDDEVSEL 0x06
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#define ATA_REG_COMMAND 0x07
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#define ATA_REG_STATUS 0x07
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#define ATA_REG_SECCOUNT1 0x08
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#define ATA_REG_LBA3 0x09
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#define ATA_REG_LBA4 0x0A
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#define ATA_REG_LBA5 0x0B
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#define ATA_REG_CONTROL 0x0C
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#define ATA_REG_ALTSTATUS 0x0C
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#define ATA_REG_DEVADDRESS 0x0D
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// Channels:
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#define ATA_PRIMARY 0x00
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#define ATA_SECONDARY 0x01
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// Directions:
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#define ATA_READ 0x00
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#define ATA_WRITE 0x01
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// Status
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#define ATA_SR_BSY 0x80 // Busy
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#define ATA_SR_DRDY 0x40 // Drive ready
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#define ATA_SR_DF 0x20 // Drive write fault
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#define ATA_SR_DSC 0x10 // Drive seek complete
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#define ATA_SR_DRQ 0x08 // Data request ready
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#define ATA_SR_CORR 0x04 // Corrected data
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#define ATA_SR_IDX 0x02 // Index
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#define ATA_SR_ERR 0x01 // Error
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// Errors
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#define ATA_ER_BBK 0x80 // Bad block
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#define ATA_ER_UNC 0x40 // Uncorrectable data
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#define ATA_ER_MC 0x20 // Media changed
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#define ATA_ER_IDNF 0x10 // ID mark not found
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#define ATA_ER_MCR 0x08 // Media change request
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#define ATA_ER_ABRT 0x04 // Command aborted
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#define ATA_ER_TK0NF 0x02 // Track 0 not found
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#define ATA_ER_AMNF 0x01 // No address mark
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#pragma once
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struct IDEChannelRegisters{
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unsigned short base; // I/O Base.
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unsigned short ctrl; // Control Base
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unsigned short bmide; // Bus Master IDE
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unsigned char nIEN; // IEN (no interrupt)
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}channels[2];
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extern unsigned char ide_buf[2048];
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extern unsigned char ide_irq_invoked;
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extern unsigned char atapi_packet[12];
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struct IDE_DEVICE {
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unsigned char Reserved; // 0 (Empty) or 1 (This device exists).
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unsigned char Channel; // 0 (Primary Channel) or 1 (Secondary Channel).
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unsigned char Drive; // 0 (Master Drive) or 1 (Slave Drive).
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unsigned short Type; // 0 ATA, 1:ATAPI
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unsigned short Signature; // Drive Signature
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unsigned short Capabilities; // Features.
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unsigned int CommandSets; // Command Sets Supported.
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unsigned int Size; // Size in Sectors
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unsigned char Model[41]; // Model in string.
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} ide_devices[4];
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#pragma once
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#include <stdint.h>
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#include "../tty/kterm.h"
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#include "sampleIDE.definitions.h"
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#include "ideCommands.h"
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void Detect_IO_Ports(uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4);
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void DetectDevices();
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unsigned char ide_buf[2048] = {0};
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unsigned char ide_irq_invoked = 0;
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unsigned char atapi_packet[12] = {0xA8,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
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void wait(int t){
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volatile int i,j;
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for(i=0;i<t;i++)
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for(j=0;j<25000;j++)
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asm("NOP");
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}
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void ide_write(unsigned char channel, unsigned char reg, unsigned char data){
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
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if (reg < 0x08)
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outb(channels[channel].base + reg - 0x00, data);
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else if (reg < 0x0C)
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outb(channels[channel].base + reg - 0x06, data);
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else if (reg < 0x0E)
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outb(channels[channel].ctrl + reg - 0x0A, data);
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else if (reg < 0x16)
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outb(channels[channel].bmide + reg - 0x0E, data);
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
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}
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unsigned char ide_read(unsigned char channel, unsigned char reg){
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unsigned char result;
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if( reg > 0x07 && reg < 0x0C)
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ide_write(channel,ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
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if( reg < 0x08)
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result = inb(channels[channel].base + reg - 0x00);
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else if (reg < 0x0C)
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result = inb(channels[channel].base + reg - 0x06);
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else if (reg < 0x0E)
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result = inb(channels[channel].ctrl + reg - 0x0A);
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else if (reg < 0x16)
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result = inb(channels[channel].bmide + reg - 0x0E);
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
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return result;
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}
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void ide_read_buffer(unsigned char channel, unsigned char reg, unsigned int buffer, unsigned int quads){
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
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if (reg < 0x08)
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insl(channels[channel].base + reg - 0x00, (void *)buffer, quads);
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else if (reg < 0x0C)
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insl(channels[channel].base + reg - 0x06, (void *)buffer, quads);
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else if (reg < 0x0E)
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insl(channels[channel].ctrl + reg - 0x0A, (void *)buffer, quads);
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else if (reg < 0x16)
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insl(channels[channel].bmide + reg - 0x0E, (void *)buffer, quads);
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
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}
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unsigned char ide_polling(unsigned char channel, unsigned int advanced_check) {
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// (I) Delay 400 nanosecond for BSY to be set:
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// -------------------------------------------------
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for(int i = 0; i < 4; i++)
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ide_read(channel, ATA_REG_ALTSTATUS); // Reading the Alternate Status port wastes 100ns; loop four times.
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// (II) Wait for BSY to be cleared:
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// -------------------------------------------------
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while (ide_read(channel, ATA_REG_STATUS) & ATA_SR_BSY)
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; // Wait for BSY to be zero.
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if (advanced_check) {
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unsigned char state = ide_read(channel, ATA_REG_STATUS); // Read Status Register.
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// (III) Check For Errors:
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// -------------------------------------------------
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if (state & ATA_SR_ERR)
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return 2; // Error.
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// (IV) Check If Device fault:
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// -------------------------------------------------
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if (state & ATA_SR_DF)
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return 1; // Device Fault.
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// (V) Check DRQ:
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// -------------------------------------------------
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// BSY = 0; DF = 0; ERR = 0 so we should check for DRQ now.
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if ((state & ATA_SR_DRQ) == 0)
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return 3; // DRQ should be set
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}
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return 0; // No Error.
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}
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unsigned char ide_print_error(unsigned int drive, unsigned char err) {
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if (err == 0)
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return err;
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printf("IDE:");
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if (err == 1) {printf("- Device Fault\n "); err = 19;}
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else if (err == 2) {
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unsigned char st = ide_read(ide_devices[drive].Channel, ATA_REG_ERROR);
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if (st & ATA_ER_AMNF) {printf("- No Address Mark Found\n "); err = 7;}
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if (st & ATA_ER_TK0NF) {printf("- No Media or Media Error\n "); err = 3;}
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if (st & ATA_ER_ABRT) {printf("- Command Aborted\n "); err = 20;}
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if (st & ATA_ER_MCR) {printf("- No Media or Media Error\n "); err = 3;}
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if (st & ATA_ER_IDNF) {printf("- ID mark not Found\n "); err = 21;}
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if (st & ATA_ER_MC) {printf("- No Media or Media Error\n "); err = 3;}
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if (st & ATA_ER_UNC) {printf("- Uncorrectable Data Error\n "); err = 22;}
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if (st & ATA_ER_BBK) {printf("- Bad Sectors\n "); err = 13;}
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} else if (err == 3) {printf("- Reads Nothing\n "); err = 23;}
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else if (err == 4) {printf("- Write Protected\n "); err = 8;}
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printf("- [%s %s] %s\n",
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(const char *[]){"Primary", "Secondary"}[ide_devices[drive].Channel], // Use the channel as an index into the array
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(const char *[]){"Master", "Slave"}[ide_devices[drive].Drive], // Same as above, using the drive
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ide_devices[drive].Model);
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return err;
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}
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inline void init_IDE( uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4)
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{
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Detect_IO_Ports( BAR0, BAR1, BAR2, BAR3, BAR4);
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printf("ATA Primary port, base: 0x%x, ctrl: 0x%x\n", channels[ATA_PRIMARY].base , channels[ATA_PRIMARY].ctrl);
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printf("ATA Secondary port, base: 0x%x, ctrl: 0x%x\n", channels[ATA_SECONDARY].base , channels[ATA_SECONDARY].ctrl);
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// 2- Disable IRQs:
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ide_write(ATA_PRIMARY , ATA_REG_CONTROL, 2);
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ide_write(ATA_SECONDARY, ATA_REG_CONTROL, 2);
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DetectDevices();
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// 4- Print Summary:
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for (int i = 0; i < 4; i++)
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if (ide_devices[i].Reserved == 1) {
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printf(" Found %s Drive %d bytes - %x\n",
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(const char *[]){"ATA", "ATAPI"}[ide_devices[i].Type], /* Type */
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ide_devices[i].Size / 2, /* Size */
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ide_devices[i].Model);
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}
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}
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// 3- Detect ATA-ATAPI Devices:
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void DetectDevices(){
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int i, j, k, count = 0;
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for (i = 0; i < 2; i++)
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for (j = 0; j < 2; j++) {
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unsigned char err = 0, type = IDE_ATA, status;
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ide_devices[count].Reserved = 0; // Assuming that no drive here.
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// (I) Select Drive:
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ide_write(i, ATA_REG_HDDEVSEL, 0xA0 | (j << 4)); // Select Drive.
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wait(1000); // Wait 1ms for drive select to work.
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// (II) Send ATA Identify Command:
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ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY);
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wait(1000);
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// (III) Polling:
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if (ide_read(i, ATA_REG_STATUS) == 0) continue; // If Status = 0, No Device.
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while(1) {
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status = ide_read(i, ATA_REG_STATUS);
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if ((status & ATA_SR_ERR)) {err = 1; break;} // If Err, Device is not ATA.
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if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRQ)) break; // Everything is right.
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}
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// (IV) Probe for ATAPI Devices:
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if (err != 0) {
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unsigned char cl = ide_read(i, ATA_REG_LBA1);
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unsigned char ch = ide_read(i, ATA_REG_LBA2);
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if (cl == 0x14 && ch ==0xEB)
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type = IDE_ATAPI;
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else if (cl == 0x69 && ch == 0x96)
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type = IDE_ATAPI;
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else
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continue; // Unknown Type (may not be a device).
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ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY_PACKET);
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wait(1000);
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}
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// (V) Read Identification Space of the Device:
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ide_read_buffer(i, ATA_REG_DATA, (unsigned int) ide_buf, 128);
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// (VI) Read Device Parameters:
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ide_devices[count].Reserved = 1;
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ide_devices[count].Type = type;
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ide_devices[count].Channel = i;
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ide_devices[count].Drive = j;
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ide_devices[count].Signature = *((unsigned short *)(ide_buf + ATA_IDENT_DEVICETYPE));
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ide_devices[count].Capabilities = *((unsigned short *)(ide_buf + ATA_IDENT_CAPABILITIES));
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ide_devices[count].CommandSets = *((unsigned int *)(ide_buf + ATA_IDENT_COMMANDSETS));
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// (VII) Get Size:
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if (ide_devices[count].CommandSets & (1 << 26))
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// Device uses 48-Bit Addressing:
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ide_devices[count].Size = *((unsigned int *)(ide_buf + ATA_IDENT_MAX_LBA_EXT));
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else
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// Device uses CHS or 28-bit Addressing:
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ide_devices[count].Size = *((unsigned int *)(ide_buf + ATA_IDENT_MAX_LBA));
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// (VIII) String indicates model of device (like Western Digital HDD and SONY DVD-RW...):
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for(k = 0; k < 40; k += 2) {
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ide_devices[count].Model[k] = ide_buf[ATA_IDENT_MODEL + k + 1];
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ide_devices[count].Model[k + 1] = ide_buf[ATA_IDENT_MODEL + k];}
|
||||
ide_devices[count].Model[40] = 0; // Terminate String.
|
||||
|
||||
count++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void Detect_IO_Ports(uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4){
|
||||
// 1 Detect I/O Ports which interface an IDE Controller
|
||||
|
||||
// Based on the implementation within serenity
|
||||
channels[ATA_PRIMARY].base = (BAR0 == 0x1 || BAR0 == 0x0) ? 0x1F0 : BAR0 & (~1);
|
||||
channels[ATA_PRIMARY ].ctrl = (BAR1 == 0x1 || BAR1 == 0x0) ? 0x3F6 : BAR1 & (~1);
|
||||
channels[ATA_SECONDARY].base = (BAR2 == 0x1 || BAR2 == 0x0) ? 0x170 : BAR2 & (~1);
|
||||
channels[ATA_SECONDARY].ctrl = (BAR3 == 0x1 || BAR3 == 0x0) ? 0x376 : BAR3 & (~1);
|
||||
channels[ATA_PRIMARY ].bmide = (BAR4 & (~1)) + 0; // Bus Master IDE
|
||||
channels[ATA_SECONDARY].bmide = (BAR4 & (~1)) + 8; // Bus Master IDE
|
||||
|
||||
}
|
||||
|
|
@ -65,7 +65,11 @@ extern "C" void kernel_main (void);
|
|||
|
||||
|
||||
// Enumerate the PCI bus
|
||||
PCI_Enumerate();
|
||||
PCI_Enumerate();
|
||||
|
||||
|
||||
|
||||
TestIDEController();
|
||||
|
||||
|
||||
while (true){
|
||||
|
|
|
|||
|
|
@ -2,6 +2,8 @@
|
|||
extern "C"{
|
||||
#include "../libc/include/string.h"
|
||||
}
|
||||
|
||||
|
||||
#include "vga/VBE.h"
|
||||
#include "tty/kterm.h"
|
||||
|
||||
|
|
@ -17,7 +19,7 @@ extern "C"{
|
|||
#include "cpu.h"
|
||||
#include "serial.h"
|
||||
#include "pci.h"
|
||||
|
||||
#include "ide/ide.h"
|
||||
|
||||
|
||||
#define CHECK_FLAG(flags, bit) ((flags) & (1 <<(bit)))
|
||||
|
|
|
|||
|
|
@ -121,8 +121,6 @@ const char* getVendor( uint32_t VendorID){
|
|||
|
||||
}
|
||||
|
||||
|
||||
|
||||
uint32_t ConfigReadWord ( PCIBusAddress& PCIDeviceAddress , uint8_t offset){
|
||||
outl(CONFIG_ADDRESS , PCIDeviceAddress.getAddress() | offset );
|
||||
return inl(CONFIG_DATA);
|
||||
|
|
@ -144,8 +142,6 @@ uint32_t ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offs
|
|||
return inl(CONFIG_DATA);
|
||||
}
|
||||
|
||||
|
||||
|
||||
uint8_t GetHeaderType( PCIBusAddress& PCIDeviceAddress ){
|
||||
uint32_t header_information = ConfigReadWord(PCIDeviceAddress , 0xC);
|
||||
return (uint8_t) (
|
||||
|
|
@ -167,9 +163,6 @@ bool IsMultiFunctionDevice(PCIBusAddress& PCIDeviceAddress){
|
|||
>> 7 );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void PrintPCIDeviceInfo (PCIBusAddress& PCIDeviceAddress)
|
||||
{
|
||||
uint32_t DeviceID = (GetDevice(PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function) >> 16);
|
||||
|
|
@ -191,8 +184,6 @@ void PrintPCIDeviceInfo (PCIBusAddress& PCIDeviceAddress)
|
|||
|
||||
}
|
||||
|
||||
|
||||
|
||||
void PCI_Enumerate(){
|
||||
int devicesFound = 0;
|
||||
// loop through all possible busses, devices and their functions;
|
||||
|
|
@ -244,3 +235,13 @@ void PCI_Enumerate(){
|
|||
|
||||
printf("Found %d PCI devices!\n", devicesFound);
|
||||
}
|
||||
|
||||
uint8_t GetProgIF (PCIBusAddress& PCIDeviceAddress){
|
||||
uint32_t data = ConfigReadWord(PCIDeviceAddress, 0x8);
|
||||
return ((data >> 8) & 0xFF);
|
||||
}
|
||||
|
||||
uint32_t ReadBAR ( PCIBusAddress& PCIDeviceAddress, int bar_number){
|
||||
int offsetToBar = 0x10 + (bar_number* 0x4);
|
||||
return ConfigReadWord(PCIDeviceAddress, offsetToBar);
|
||||
}
|
||||
|
|
@ -32,4 +32,7 @@ uint16_t GetClassCodes( PCIBusAddress& PICDeviceAddress );
|
|||
const char* getVendor( uint64_t VendorID);
|
||||
const char* GetClassCodeName (uint64_t ClassCode );
|
||||
|
||||
void PCI_Enumerate();
|
||||
uint8_t GetProgIF (PCIBusAddress& PCIDeviceAddress);
|
||||
void PCI_Enumerate();
|
||||
|
||||
uint32_t ReadBAR ( PCIBusAddress& PCIDeviceAddress, int bar_number);
|
||||
Loading…
Reference in New Issue