Basic PCI Enumeration
parent
23ede25ed6
commit
ec654143c6
7
Makefile
7
Makefile
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@ -5,7 +5,7 @@ CC = ${HOME}/opt/cross/bin/i686-elf-gcc
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CPP = ${HOME}/opt/cross/bin/i686-elf-g++
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CFLAGS = -ffreestanding -O2 -Wall -Wextra
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OFILES = $(BUILD_DIR)/boot.o $(BUILD_DIR)/kterm.o $(BUILD_DIR)/kernel.o $(BUILD_DIR)/PhysicalMemoryManager.o $(BUILD_DIR)/io.o $(BUILD_DIR)/PageDirectory.o $(BUILD_DIR)/gdtc.o $(BUILD_DIR)/idt.o $(BUILD_DIR)/pic.o $(BUILD_DIR)/string.o
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OFILES = $(BUILD_DIR)/boot.o $(BUILD_DIR)/kterm.o $(BUILD_DIR)/kernel.o $(BUILD_DIR)/PhysicalMemoryManager.o $(BUILD_DIR)/io.o $(BUILD_DIR)/PageDirectory.o $(BUILD_DIR)/gdtc.o $(BUILD_DIR)/idt.o $(BUILD_DIR)/pci.o $(BUILD_DIR)/pic.o $(BUILD_DIR)/string.o
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SRC_DIR = src
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BUILD_DIR = build
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@ -36,7 +36,7 @@ iso: clean_iso clean build
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grub-mkrescue -o build/barinkOS.iso root
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test:
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$(EMULATOR) -kernel $(BUILD_DIR)/myos.bin -serial stdio -vga std -monitor stdio -display gtk -m 2G -cpu core2duo
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$(EMULATOR) -kernel $(BUILD_DIR)/myos.bin -serial stdio -vga std -display gtk -m 2G -cpu core2duo
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build_kernel: $(OBJ_LINK_LIST)
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$(CC) -T $(SRC_DIR)/kernel//linker.ld -o $(BUILD_DIR)/myos.bin \
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@ -85,3 +85,6 @@ $(BUILD_DIR)/string.o:
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$(BUILD_DIR)/PhysicalMemoryManager.o:
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$(CPP) -c $(SRC_DIR)/kernel/memory/PhysicalMemoryManager.cpp -o $(BUILD_DIR)/PhysicalMemoryManager.o $(CFLAGS) -fno-exceptions -fno-rtti
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$(BUILD_DIR)/pci.o:
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$(CPP) -c $(SRC_DIR)/kernel/pci.cpp -o $(BUILD_DIR)/pci.o $(CFLAGS) -fno-exceptions -fno-rtti
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@ -52,10 +52,6 @@ void initGDT(){
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LoadGlobalDescriptorTable();
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while (true)
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asm volatile("hlt");
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}
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@ -12,9 +12,10 @@ unsigned short inw_p(unsigned short ){
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// TODO: implement me!
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return 0;
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}
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unsigned int inl(unsigned short ){
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// TODO: implement me!
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return 0;
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uint32_t inl( int port ){
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unsigned int data;
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asm volatile ("inl %w1, %0": "=a" (data): "d" (port));
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return data;
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}
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unsigned int inl_p(unsigned short ){
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// TODO: implement me!
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@ -31,9 +32,12 @@ void outw(unsigned short , unsigned short ){
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void outw_p(unsigned short , unsigned short ){
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}
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void outl(unsigned int , unsigned short ){
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void outl( int port , uint32_t data ){
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asm volatile ("outl %0, %1" :: "a" (data), "dn"(port));
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}
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void outl_p(unsigned int , unsigned short ){
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}
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@ -12,21 +12,17 @@ static inline uint8_t inb(uint16_t port)
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unsigned char inb_p(unsigned short port);
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unsigned short inw(unsigned short port);
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unsigned short inw_p(unsigned short port);
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unsigned int inl(unsigned short port);
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uint32_t inl( int port );
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unsigned int inl_p(unsigned short port);
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static inline void outb(uint16_t port, uint8_t val)
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{
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asm volatile ( "outb %0, %1" : : "a"(val), "Nd"(port) );
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/* There's an outb %al, $imm8 encoding, for compile-time constant port numbers that fit in 8b. (N constraint).
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* Wider immediate constants would be truncated at assemble-time (e.g. "i" constraint).
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* The outb %al, %dx encoding is the only option for all other cases.
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* %1 expands to %dx because port is a uint16_t. %w1 could be used if we had the port number a wider C type */
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}
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void outb_p(unsigned char value, unsigned short port);
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void outw(unsigned short value, unsigned short port);
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void outw_p(unsigned short value, unsigned short port);
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void outl(unsigned int value, unsigned short port);
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void outl( int port , uint32_t data );
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void outl_p(unsigned int value, unsigned short port);
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void insb(unsigned short port, void *addr,
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@ -1,15 +1,20 @@
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#include "kernel.h"
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#define GB4 524288
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#define GB2 262144
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int memcmp( const void* ptr1, const void* ptr2, size_t num);
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extern "C" void kernel_main (void);
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extern "C" void early_main(unsigned long magic, unsigned long addr){
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/** initialize terminal interface */
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/** initialize terminal interface */
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kterm_init();
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if (magic != MULTIBOOT_BOOTLOADER_MAGIC){
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printf("Invalid magic number: 0x%x\n", magic);
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return;
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}
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CheckMBT( (multiboot_info_t *) addr);
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multiboot_info_t* mbt = (multiboot_info_t*) addr;
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@ -27,19 +32,83 @@
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}
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initGDT();
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kernel_main();
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}
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int memcmp( const void* ptr1, const void* ptr2, size_t num)
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{
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const unsigned char * cs = (const unsigned char*) ptr1;
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const unsigned char * ct = (const unsigned char*) ptr2;
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for (int i = 0 ; i < num ; i++, cs++, ct++ ){
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if( *cs < *ct){
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return -1;
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} else if( *cs > *ct){
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return 1;
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}
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}
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return 0;
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}
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extern "C" void kernel_main (void) {
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printf("call to init serial\n");
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init_serial();
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print_serial("Serial port initialized!");
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// Enumerate the PCI bus
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int devicesFound = 0;
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// loop through all possible busses, devices and their functions;
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for( int bus = 0 ; bus < 256 ; bus++)
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{
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for(int device = 0; device < 32 ; device ++)
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{
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for ( int function = 0; function < 8; function++)
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{
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uint64_t DeviceIdentify = ConfigReadWord(bus, device, function,0x0);
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uint32_t VendorID = DeviceIdentify & 0xFFFF;
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uint32_t DeviceID = DeviceIdentify >> 16;
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if( DeviceID != 0xFFFF){
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printf("bus: %d, device: %d, function %d \n");
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printf("Device found!\n");
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printf("DeviceID: 0x%x, VendorID: 0x%x\n", DeviceID, VendorID);
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uint32_t classcodes = ConfigReadWord(bus, device, function, 0x8);
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uint32_t classData = classcodes >> 16; // We only care for the last 2 bytes!
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uint32_t deviceClass = classData >> 8;
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uint32_t subclass = classData & 0xFF;
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printf(" class: %d, subClass: %d\n\n", deviceClass, subclass);
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devicesFound++;
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}
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}
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}
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}
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printf("Found %d devices!", devicesFound);
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while (true){
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//Read time indefinetely
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read_rtc();
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printf( "UTC time: %02d-%02d-%02d %02d:%02d:%02d [ Formatted as YY-MM-DD h:mm:ss]\r" ,year, month, day, hour, minute, second);
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//read_rtc();
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//printf( "UTC time: %02d-%02d-%02d %02d:%02d:%02d [ Formatted as YY-MM-DD h:mm:ss]\r" ,year, month, day, hour, minute, second);
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delay(1000);
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}
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@ -16,6 +16,8 @@ extern "C"{
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#include "time.h"
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#include "cpu.h"
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#include "serial.h"
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#include "pci.h"
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#define CHECK_FLAG(flags, bit) ((flags) & (1 <<(bit)))
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#define PANIC(message) { return; }
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@ -1,108 +1,28 @@
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#include "pci.h"
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#include "tty/kterm.h"
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#define PCI_BUS_ADDR_SHIFT 16
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#define PCI_DEVICE_ADDR_SHIFT 11
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#define PCI_FUNCTION_ADDR_SHIFT 8
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#define PCI_ENABLE_ADDR_SHIFT 31
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uint16_t ConfigReadWord (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset){
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uint32_t ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offset){
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uint32_t address;
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uint32_t lbus = (uint32_t) bus;
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uint32_t lslot = (uint32_t) slot;
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uint32_t lfunc = (uint32_t) func;
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uint16_t tmp = 0;
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/* Create configuration address as per Figure 1 */
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address = (uint32_t) ((lbus << 16) | (lslot << 11) | (lfunc << 8) | (offset & 0xFC) |((uint32_t) 0x80000000) );
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/*write out the address */
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address = (uint32_t) (
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((uint32_t) 1 << PCI_ENABLE_ADDR_SHIFT) |
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((uint32_t)bus << PCI_BUS_ADDR_SHIFT) |
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((uint32_t)device << PCI_DEVICE_ADDR_SHIFT) |
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((uint32_t)func << PCI_FUNCTION_ADDR_SHIFT) |
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offset );
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// printf("PCI address read 0x%x", address);
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outl(CONFIG_ADDRESS, address);
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/* read in the data */
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/* (offset & 2 ) * 8 ) = o will choosse the first word of the 32 bits register*/
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tmp = (uint16_t)((inl(CONFIG_DATA)) >> ((offset & 2) * 8) & 0xFFFF);
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return (tmp);
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return inl(CONFIG_DATA);
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}
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uint16_t CheckVendor (uint8_t bus, uint8_t slot) {
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uint16_t vendor, device;
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/*
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Try and read the first configuration register. Since there ar no
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vendors that == 0xFFFF, it must be a non-existent device.
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*/
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if((vendor = ConfigReadWord(bus, slot, 0,0)) != 0xFFFF) {
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device = ConfigReadWord(bus, slot, 0,2);
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// Possible read more config values ...
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} return (vendor);
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}
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void checkDevice (uint8_t bus, uint8_t device ) {
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uint8_t function = 0;
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uint16_t vendorID = CheckVendor(bus, device);
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if (vendorID == 0xFFFF) {
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return;
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}
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checkFunction (bus, device, function );
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headerType = getHeaderType(bus, device, function );
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if( (headerType & 0x80) != 0) {
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/* It is a multi-function device, so check remaining functions */
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for (function = 1; function < 8; function++){
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if (CheckVendor(bus, device)!= 0xFFFF){
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checkFunction(bus, device, function );
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}
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}
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}
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}
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void checkFunction (uint8_t bus, uint8_t device, uint8_t function ){
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uint8_t baseClass;
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uint8_t subClass;
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uint8_t secondaryBus;
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baseClass = getBaseClass(bus, device, function);
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subClass = getSubClass (bus, device, function );
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if ( (baseClass == 0x06) && (subClass == 0x04)){
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secondaryBus = getSecondaryBus(bus,device, function);
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checkBus(secondaryBus);
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}
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}
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// Brute-force scan
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void checkAllBuses (){
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uint16_t bus;
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uint8_t device;
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for(bus = 0; bus < 256; bus++){
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for(device = 0; device < 32; device++){
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checkDevice(bus,device);
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}
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}
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}
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// Recursive scan
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void checkBus (uint8_t bus){
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uint8_t device;
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for(device = 0; device < 32; device ++){
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checkDevice(bus,device);
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}
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}
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void checkAllBuses(){
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uint8_t function;
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uint8_t bus;
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headerType = getHeaderType(0,0,0);
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if ( (headerType & 0x80) == 0 ){
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/* Single PCI host controller */
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checkBus(0);
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} else{
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/* Multiple PCI host controllers */
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for (function = 0; function < 8; function++){
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if( CheckVendor(0,0) != 0xFFFF) {
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break;
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}
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bus = function;
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checkBus(bus);
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}
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}
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}
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@ -5,54 +5,13 @@
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#define CONFIG_ADDRESS 0xCF8 // Configuration adress that is to be accessed
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#define CONFIG_DATA 0xCFC // Will do the actual configuration operation
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/*
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CONFIG_ADDRESS
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32 bit register
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bit 31 Enable bit (Should CONFIG_DATA be translatedc to configuration cycles)
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bit 30 - 24 Reserved
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bit 23 - 16 Bus Number (Choose a specific PCI BUS)
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bit 15 - 11 Device Number (Selects specific device one the pci bus)
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bit 10 - 8 Function Number (Selects a specific function in a device)
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bit 7 - 0 Register Offset (Offset in the configuration space of 256 Bytes ) NOTE: lowest two bits will always be zero
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*/
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uint32_t ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offset);
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/*
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PCI Device structure
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inline uint16_t getVendorID(uint8_t bus, uint8_t device, uint8_t function ){
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return ConfigReadWord ( bus , device, function, 0);
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}
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Register offset bits 31-24 bits 23-16 bits 15-8 bits 7-0
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00 00 Device ID <---- Vendor ID <-------
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01 04 Status <---- Command <-------
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02 08 Class code Sub class Prog IF Revision ID
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03 0C BIST Header Type Ltncy Timer Cache line Size
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04 10 Base address #0 (BAR0)
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05 14 Base address #1 (BAR1)
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06 18 Base address #2 (BAR2)
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07 1C Base address #3 (BAR3)
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08 20 Base address #4 (BAR4)
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09 24 Base address #5 (BAR5)
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0A 28 Cardbus CIS Pointer
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0B 2C Subsystem ID <------ Subsystem Vendor ID <-------
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0C 30 Expansion ROM base address
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0D 34 Reserved <------- Capabilities Pointer <------
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0E 38 Reserved <------- <-------- <--------
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0F 3C Max ltncy Min Grant Interrupt PIN Interrupt Line
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*/
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/*
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The idea for now is to support the minimal things necessary to find ATA supported drives
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*/
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// Lets write some boiler plate configuration code
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uint16_t ConfigReadWord (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
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uint16_t CheckVendor (uint8_t bus, uint8_t slot);
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void checkDevice (uint8_t bus, uint8_t device );
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inline uint16_t getDeviceID(uint8_t bus, uint8_t device, uint8_t function ){
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return ConfigReadWord(bus, device, function , 16);
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}
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