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2db83b33e1
Author | SHA1 | Date | |
---|---|---|---|
2db83b33e1 | |||
5a68f77b33 | |||
72438ae70d | |||
a36e3d1c16 | |||
08b97af863 | |||
5089da5e9e | |||
ec654143c6 |
31
Makefile
31
Makefile
@ -5,7 +5,22 @@ CC = ${HOME}/opt/cross/bin/i686-elf-gcc
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|||||||
CPP = ${HOME}/opt/cross/bin/i686-elf-g++
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CPP = ${HOME}/opt/cross/bin/i686-elf-g++
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CFLAGS = -ffreestanding -O2 -Wall -Wextra
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CFLAGS = -ffreestanding -O2 -Wall -Wextra
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OFILES = $(BUILD_DIR)/boot.o $(BUILD_DIR)/kterm.o $(BUILD_DIR)/kernel.o $(BUILD_DIR)/PhysicalMemoryManager.o $(BUILD_DIR)/io.o $(BUILD_DIR)/PageDirectory.o $(BUILD_DIR)/gdtc.o $(BUILD_DIR)/idt.o $(BUILD_DIR)/pic.o $(BUILD_DIR)/string.o
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OFILES = \
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$(BUILD_DIR)/boot.o \
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$(BUILD_DIR)/kterm.o \
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$(BUILD_DIR)/kernel.o \
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$(BUILD_DIR)/PhysicalMemoryManager.o \
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$(BUILD_DIR)/io.o \
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$(BUILD_DIR)/PageDirectory.o \
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$(BUILD_DIR)/gdtc.o \
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$(BUILD_DIR)/idt.o \
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$(BUILD_DIR)/pci.o \
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$(BUILD_DIR)/pic.o \
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$(BUILD_DIR)/string.o \
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$(BUILD_DIR)/pcidevice.o \
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$(BUILD_DIR)/atapiDevice.o
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||||||
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SRC_DIR = src
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SRC_DIR = src
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BUILD_DIR = build
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BUILD_DIR = build
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@ -36,7 +51,10 @@ iso: clean_iso clean build
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grub-mkrescue -o build/barinkOS.iso root
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grub-mkrescue -o build/barinkOS.iso root
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test:
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test:
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$(EMULATOR) -kernel $(BUILD_DIR)/myos.bin -serial stdio -vga std -monitor stdio -display gtk -m 2G -cpu core2duo
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$(EMULATOR) -kernel $(BUILD_DIR)/myos.bin -serial stdio -vga std -display gtk -m 2G -cpu core2duo
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test_iso:
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$(EMULATOR) -cdrom $(BUILD_DIR)/barinkOS.iso -serial stdio -vga std -display gtk -m 2G -cpu core2duo
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build_kernel: $(OBJ_LINK_LIST)
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build_kernel: $(OBJ_LINK_LIST)
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$(CC) -T $(SRC_DIR)/kernel//linker.ld -o $(BUILD_DIR)/myos.bin \
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$(CC) -T $(SRC_DIR)/kernel//linker.ld -o $(BUILD_DIR)/myos.bin \
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@ -85,3 +103,12 @@ $(BUILD_DIR)/string.o:
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$(BUILD_DIR)/PhysicalMemoryManager.o:
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$(BUILD_DIR)/PhysicalMemoryManager.o:
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$(CPP) -c $(SRC_DIR)/kernel/memory/PhysicalMemoryManager.cpp -o $(BUILD_DIR)/PhysicalMemoryManager.o $(CFLAGS) -fno-exceptions -fno-rtti
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$(CPP) -c $(SRC_DIR)/kernel/memory/PhysicalMemoryManager.cpp -o $(BUILD_DIR)/PhysicalMemoryManager.o $(CFLAGS) -fno-exceptions -fno-rtti
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$(BUILD_DIR)/pci.o:
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$(CPP) -c $(SRC_DIR)/kernel/pci.cpp -o $(BUILD_DIR)/pci.o $(CFLAGS) -fno-exceptions -fno-rtti
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$(BUILD_DIR)/pcidevice.o:
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$(CPP) -c $(SRC_DIR)/kernel/pci/pciDevice.cpp -o $(BUILD_DIR)/pcidevice.o $(CFLAGS) -fno-exceptions -fno-rtti
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$(BUILD_DIR)/atapiDevice.o:
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$(CPP) -c $(SRC_DIR)/kernel/drivers/atapi/atapiDevice.cpp -o $(BUILD_DIR)/atapiDevice.o $(CFLAGS) -fno-exceptions -fno-rtti
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@ -16,6 +16,13 @@ W.I.P - Working on interrupt handling
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 \
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 \
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Multiboot information can be read by the kernel.
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Multiboot information can be read by the kernel.
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 \
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Enumerating the PCI bus
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 \
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Correctly identified our ATAPI device 🎉
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________________________
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________________________
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### The goal
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### The goal
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@ -17,7 +17,7 @@
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<input type="checkbox" /> Enable SIMD Extensions (SSE)
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<input type="checkbox" /> Enable SIMD Extensions (SSE)
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## Other features I am thinking of:
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## Other features I am thinking of:
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<input type="checkbox" /> PCI support \
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<input type="checkbox" checked/> PCI support \
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<input type="checkbox" /> ATA PIO Mode support \
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<input type="checkbox" /> ATA PIO Mode support \
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<input type="checkbox" /> USTAR Filesystem ( For its simplicity this is very likely the first filesystem the OS is going to support) \
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<input type="checkbox" /> USTAR Filesystem ( For its simplicity this is very likely the first filesystem the OS is going to support) \
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<input type="checkbox" /> ACPI support ( Or some other basic way to support shutdown, reboot and possibly hibernation ) \
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<input type="checkbox" /> ACPI support ( Or some other basic way to support shutdown, reboot and possibly hibernation ) \
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BIN
screenshots/CD-ROM_Identify.png
(Stored with Git LFS)
Normal file
BIN
screenshots/CD-ROM_Identify.png
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
screenshots/PCIBusEnumeration.png
(Stored with Git LFS)
Normal file
BIN
screenshots/PCIBusEnumeration.png
(Stored with Git LFS)
Normal file
Binary file not shown.
131
src/kernel/drivers/ata/ataDevice.cpp
Normal file
131
src/kernel/drivers/ata/ataDevice.cpp
Normal file
@ -0,0 +1,131 @@
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#include "atapiDevice.h"
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#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
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void ATA_DEVICE::Soft_Reset(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive){
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printf("Soft reseting drive...\n");
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outb(channels[DEVICE_CHANNEL].base + 7 , 0x4);
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// wait a bit..
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for(int i = 0 ; i < 1000000; i++){
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asm volatile("NOP");
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}
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outb(channels[DEVICE_CHANNEL].base + 7 , 0x0);
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}
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void ATA_DEVICE::Identify(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive ){
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// lets ignore which port we actually want to check for now !
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/*
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THE STEPS INVOLVED
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1. Select the target drive by sending master (0x0A) or slave (0x0B) to the
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drive select IO port
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2. Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
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3. Send the identify command (0xEC) to the command IO port
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4. Read the status port
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4.2 If the value is 0x0 the drive does not exist
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4.3 If it has any other value continue
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5. poll the status port until bit 7 is clear.
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6. Check if the LBAmid and LBAhi ports are non-zero
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6.2. If non-zero stop polling this is not an ATA device
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6.3 If zero continue
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7. poll status port until bit 3 is set or bit 0 is set
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8. if err is clear, read the data from the data port
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*/
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// Assuming Master here
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// Select the target drive
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outb(0x176, 0x0A); // on the primary bus select the master drive
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// Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
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outb(0x172, 0);
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outb(0x173, 0);
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outb(0x174, 0);
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outb(0x175, 0);
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// send the identify command;
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outb(0x177, 0xA1);
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// read the status port
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uint8_t status = inb(0x177);
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if( status == 0x00){
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printf("No drive\n");
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return;
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}
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while(true){
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status = inb(0x177);
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if( status & (~8))
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break;
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}
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printf("Is this an ATA device?\n");
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uint8_t LBAmid = inb(0x174);
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uint8_t LBAhi = inb(0x175);
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printf("LBAmid: 0x%x, LBAhi: 0x%x\n", LBAmid, LBAhi);
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if( LBAhi != 0x0 || LBAmid != 0x0){
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printf("Not ATA device.. Stopping..\n");
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// return;
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}
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while(true){
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status = inb(0x177);
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printf( "Status bit: 0x%x\n", status);
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if ( IS_BIT_SET(status, 3)){
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printf("Status: ready!\n");
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break;
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}
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if( IS_BIT_SET(status, 0)){
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printf("Status: error!\n");
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break;
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}
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}
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if( IS_BIT_SET(status, 0) == false){
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// READ DATA
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uint16_t deviceIdentify [256];
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for (int i= 0; i < 256; i++){
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uint8_t data = inb(0x170);
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uint8_t data2 = inb(0x170);
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deviceIdentify[i] = (uint16_t) ( (uint16_t) data << 8 | (uint16_t) data2 );
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}
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||||||
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printf("Data received!\n");
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}
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printf("Error bit was set!\n");
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||||||
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||||||
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}
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||||||
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|
||||||
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||||||
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void ATA_DEVICE::Read(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
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printf("Not implemented");
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||||||
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}
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||||||
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||||||
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void ATA_DEVICE::Write(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
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printf("Not implemented");
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||||||
|
}
|
29
src/kernel/drivers/ata/ataDevice.h
Normal file
29
src/kernel/drivers/ata/ataDevice.h
Normal file
@ -0,0 +1,29 @@
|
|||||||
|
#pragma once
|
||||||
|
#include <stdint.h>
|
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|
#include "../io.h"
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|
#include "../ide/ideCommands.h"
|
||||||
|
#include "../ide/sampleIDE.definitions.h"
|
||||||
|
|
||||||
|
#include "../tty/kterm.h"
|
||||||
|
|
||||||
|
/*
|
||||||
|
* This first driver wil make use of IO ports.
|
||||||
|
* Doing so means reading or writing from disk is going
|
||||||
|
* to be very cpu intensive.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
enum DEVICE_DRIVE{
|
||||||
|
MASTER = 0xA0,
|
||||||
|
SLAVE = 0xB0
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
namespace ATA_DEVICE
|
||||||
|
{
|
||||||
|
void Identify ( uint8_t, DEVICE_DRIVE );
|
||||||
|
void Read ( uint8_t, DEVICE_DRIVE );
|
||||||
|
void Write ( uint8_t, DEVICE_DRIVE );
|
||||||
|
void Soft_Reset ( uint8_t, DEVICE_DRIVE );
|
||||||
|
|
||||||
|
};
|
145
src/kernel/drivers/atapi/atapiDevice.cpp
Normal file
145
src/kernel/drivers/atapi/atapiDevice.cpp
Normal file
@ -0,0 +1,145 @@
|
|||||||
|
#include "atapiDevice.h"
|
||||||
|
#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
|
||||||
|
|
||||||
|
bool isPacketDevice(){
|
||||||
|
|
||||||
|
uint8_t LBAmid = inb(0x174);
|
||||||
|
uint8_t LBAhi = inb(0x175);
|
||||||
|
|
||||||
|
printf(" LBAmid: 0x%x, LBAhi: 0x%x");
|
||||||
|
return LBAmid == 0x14 && LBAhi == 0xEB;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void ATAPI_DEVICE::Identify(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive ){
|
||||||
|
// lets ignore which port we actually want to check for now !
|
||||||
|
|
||||||
|
/* THE STEPS INVOLVED
|
||||||
|
|
||||||
|
1. Select the target drive by sending master (0x0A) or slave (0x0B) to the
|
||||||
|
drive select IO port
|
||||||
|
|
||||||
|
2. Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
|
||||||
|
|
||||||
|
3. Send the identify command (0xEC) to the command IO port
|
||||||
|
|
||||||
|
4. Read the status port
|
||||||
|
4.2 If the value is 0x0 the drive does not exist
|
||||||
|
4.3 If it has any other value continue
|
||||||
|
5. poll the status port until bit 7 is clear.
|
||||||
|
6. Check if the LBAmid and LBAhi ports are non-zero
|
||||||
|
6.2. If non-zero stop polling this is not an ATA device
|
||||||
|
6.3 If zero continue
|
||||||
|
|
||||||
|
7. poll status port until bit 3 is set or bit 0 is set
|
||||||
|
|
||||||
|
8. if err is clear, read the data from the data port
|
||||||
|
|
||||||
|
|
||||||
|
*/
|
||||||
|
|
||||||
|
// Select the target drive
|
||||||
|
outb(0x176, 0xA0); // on the secondary bus select the master drive
|
||||||
|
outb(0x170 + 0x206 , 0x0); // write 0 to the controlport for some reason
|
||||||
|
|
||||||
|
outb(0x176, 0xA0);
|
||||||
|
// read the status port
|
||||||
|
uint8_t status = inb(0x177);
|
||||||
|
printf("status after drive select: 0x%x\n",status);
|
||||||
|
if( status == 0x00){
|
||||||
|
printf("No drive\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
outb(0x176, 0xA0);
|
||||||
|
|
||||||
|
|
||||||
|
// Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
|
||||||
|
outb(0x172, 0);
|
||||||
|
|
||||||
|
outb(0x173, 0);
|
||||||
|
|
||||||
|
outb(0x174, 0);
|
||||||
|
|
||||||
|
outb(0x175, 0);
|
||||||
|
|
||||||
|
// send the identify command;
|
||||||
|
printf("command sent!\n");
|
||||||
|
outb(0x177, 0xA1);
|
||||||
|
|
||||||
|
// read the status port
|
||||||
|
uint8_t status2 = inb(0x177);
|
||||||
|
if( status2 == 0x00){
|
||||||
|
printf("No drive\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
printf("Waiting until ready...\n");
|
||||||
|
|
||||||
|
while(((status2 & 0x80 == 0x80)
|
||||||
|
&& (status2 & 0x01) != 0x01)
|
||||||
|
) status2 = inb(0x177);
|
||||||
|
|
||||||
|
|
||||||
|
if(status2 & 0x01){
|
||||||
|
printf("Error!");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
// READ DATA
|
||||||
|
|
||||||
|
uint16_t deviceIdentify [256] ={0};
|
||||||
|
|
||||||
|
for (int i= 0; i < 256; i++){
|
||||||
|
uint16_t data;
|
||||||
|
asm volatile ( "in %1, %0"
|
||||||
|
: "=a"(data)
|
||||||
|
: "Nd"(0x170) );
|
||||||
|
|
||||||
|
|
||||||
|
deviceIdentify[i] = data ;
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
printf("Model-label (ASCII hex):\n");
|
||||||
|
for(int i = 27; i < 47; i++){
|
||||||
|
printf(" %x ",deviceIdentify[i]);
|
||||||
|
}
|
||||||
|
|
||||||
|
printf("\nSerial number (ASCII hex):\n");
|
||||||
|
for (int i = 10; i < 19; i++){
|
||||||
|
printf(" %x ", deviceIdentify[i]);
|
||||||
|
}
|
||||||
|
|
||||||
|
printf("\nFirmware revision (ASCII hex):\n");
|
||||||
|
for (int i = 23; i < 26; i++){
|
||||||
|
printf(" %x ", deviceIdentify[i]);
|
||||||
|
}
|
||||||
|
|
||||||
|
printf("\nConfiguration: %x\n", deviceIdentify[0]);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
printf("\nData received!\n");
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void ATAPI_DEVICE::Read(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
|
||||||
|
printf("Not implemented");
|
||||||
|
}
|
||||||
|
|
||||||
|
void ATAPI_DEVICE::Write(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
|
||||||
|
printf("Not implemented");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
29
src/kernel/drivers/atapi/atapiDevice.h
Normal file
29
src/kernel/drivers/atapi/atapiDevice.h
Normal file
@ -0,0 +1,29 @@
|
|||||||
|
#pragma once
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "../../io.h"
|
||||||
|
#include "../../ide/ideCommands.h"
|
||||||
|
#include "../../ide/sampleIDE.definitions.h"
|
||||||
|
|
||||||
|
#include "../../tty/kterm.h"
|
||||||
|
|
||||||
|
/*
|
||||||
|
* This first driver wil make use of IO ports.
|
||||||
|
* Doing so means reading or writing from disk is going
|
||||||
|
* to be very cpu intensive.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
enum DEVICE_DRIVE{
|
||||||
|
MASTER = 0xA0,
|
||||||
|
SLAVE = 0xB0
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
namespace ATAPI_DEVICE
|
||||||
|
{
|
||||||
|
bool isPacketDevice();
|
||||||
|
void Identify ( uint8_t, DEVICE_DRIVE );
|
||||||
|
void Read ( uint8_t, DEVICE_DRIVE );
|
||||||
|
void Write ( uint8_t, DEVICE_DRIVE );
|
||||||
|
|
||||||
|
};
|
@ -52,10 +52,6 @@ void initGDT(){
|
|||||||
|
|
||||||
LoadGlobalDescriptorTable();
|
LoadGlobalDescriptorTable();
|
||||||
|
|
||||||
while (true)
|
|
||||||
asm volatile("hlt");
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
97
src/kernel/ide/ide.h
Normal file
97
src/kernel/ide/ide.h
Normal file
@ -0,0 +1,97 @@
|
|||||||
|
#pragma once
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "../pci/pciDevice.h"
|
||||||
|
#include "../tty/kterm.h"
|
||||||
|
#include "ideCommands.h"
|
||||||
|
#include "sampleIDE.h"
|
||||||
|
|
||||||
|
#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
|
||||||
|
|
||||||
|
IDEChannelRegisters channels[2];
|
||||||
|
IDE_DEVICE ide_devices[4];
|
||||||
|
|
||||||
|
inline void CheckProgIF(uint8_t ProgIF){
|
||||||
|
if( IS_BIT_SET(ProgIF, 0) ) // Is the 0th bit set
|
||||||
|
{
|
||||||
|
printf ("Primary Channel is in PCI native mode\n");
|
||||||
|
} else{
|
||||||
|
printf("Primary Channel is in Compatibility mode\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
if( IS_BIT_SET(ProgIF, 1)){
|
||||||
|
printf("Bit 0 can be modified\n");
|
||||||
|
}else{
|
||||||
|
printf("Bit 0 cannot be modified\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
if( IS_BIT_SET(ProgIF, 2)){
|
||||||
|
printf("Secondary channel is in PCI native mode\n");
|
||||||
|
}else{
|
||||||
|
printf("Secondary channel is in Compatibility mode\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
if( IS_BIT_SET(ProgIF, 3)){
|
||||||
|
printf("Bit 2 can be modified\n");
|
||||||
|
}else{
|
||||||
|
printf("Bit 2 cannot be modified\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
if( IS_BIT_SET(ProgIF , 7)){
|
||||||
|
printf("This is a bus master IDE Controller\n");
|
||||||
|
} else{
|
||||||
|
printf("This controller doesn't support DMA!\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
inline void TestIDEController(){
|
||||||
|
// Do stuff
|
||||||
|
printf("Testing IDE controllers\n");
|
||||||
|
|
||||||
|
// NOTE: Testing done with a hard coded known PCI addres
|
||||||
|
// Of an intel PIIX3 IDE Controller
|
||||||
|
int bus = 0;
|
||||||
|
int device =1 , function = 1;
|
||||||
|
PCIBusAddress IDEControllerPCIAddress = PCIBusAddress{bus,device, function};
|
||||||
|
|
||||||
|
uint8_t ProgIF = GetProgIF(IDEControllerPCIAddress);
|
||||||
|
printf( "ProgIF: 0x%x\n" ,ProgIF);
|
||||||
|
|
||||||
|
//CheckProgIF(ProgIF);
|
||||||
|
|
||||||
|
// For this test will just assume all bits are set
|
||||||
|
// the CheckProgIF can check but on the test machine all bits are set anyways
|
||||||
|
|
||||||
|
uint32_t BAR0,BAR1,BAR2,BAR3, BAR4;
|
||||||
|
|
||||||
|
BAR0 = ReadBAR(IDEControllerPCIAddress, 0);
|
||||||
|
|
||||||
|
BAR1 = ReadBAR(IDEControllerPCIAddress, 1);
|
||||||
|
|
||||||
|
BAR2 = ReadBAR(IDEControllerPCIAddress, 2);
|
||||||
|
|
||||||
|
BAR3 = ReadBAR(IDEControllerPCIAddress, 3);
|
||||||
|
|
||||||
|
BAR4 = ReadBAR(IDEControllerPCIAddress, 4);
|
||||||
|
|
||||||
|
// All bars are return 0xffffff for some as of yet mysterious reason!
|
||||||
|
printf( "BAR 0: 0x%x\n", BAR0);
|
||||||
|
|
||||||
|
printf( "BAR 1: 0x%x\n", BAR1);
|
||||||
|
|
||||||
|
printf( "BAR 2: 0x%x\n", BAR2);
|
||||||
|
|
||||||
|
printf( "BAR 3: 0x%x\n", BAR3);
|
||||||
|
|
||||||
|
printf( "BAR 4: 0x%x\n", BAR4);
|
||||||
|
|
||||||
|
init_IDE(BAR0, BAR1, BAR2, BAR3, BAR4);
|
||||||
|
|
||||||
|
// Read Something from disc
|
||||||
|
unsigned int maxByteCount = 20 ;
|
||||||
|
void* MDA_buffer = (void*)0xC0000000;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
86
src/kernel/ide/ideCommands.h
Normal file
86
src/kernel/ide/ideCommands.h
Normal file
@ -0,0 +1,86 @@
|
|||||||
|
#pragma once
|
||||||
|
|
||||||
|
// Commands
|
||||||
|
#define ATA_CMD_READ_PIO 0x20
|
||||||
|
#define ATA_CMD_READ_PIO_EXT 0x24
|
||||||
|
#define ATA_CMD_READ_DMA 0xC8
|
||||||
|
#define ATA_CMD_READ_DMA_EXT 0x25
|
||||||
|
#define ATA_CMD_WRITE_PIO 0x30
|
||||||
|
#define ATA_CMD_WRITE_PIO_EXT 0x34
|
||||||
|
#define ATA_CMD_WRITE_DMA 0xCA
|
||||||
|
#define ATA_CMD_WRITE_DMA_EXT 0x35
|
||||||
|
#define ATA_CMD_CACHE_FLUSH 0xE7
|
||||||
|
#define ATA_CMD_CACHE_FLUSH_EXT 0xEA
|
||||||
|
#define ATA_CMD_PACKET 0xA0
|
||||||
|
#define ATA_CMD_IDENTIFY_PACKET 0xA1
|
||||||
|
#define ATA_CMD_IDENTIFY 0xEC
|
||||||
|
|
||||||
|
#define ATAPI_CMD_READ 0xA8
|
||||||
|
#define ATAPI_CMD_EJECT 0x1B
|
||||||
|
|
||||||
|
#define ATA_IDENT_DEVICETYPE 0
|
||||||
|
#define ATA_IDENT_CYLINDERS 2
|
||||||
|
#define ATA_IDENT_HEADS 6
|
||||||
|
#define ATA_IDENT_SECTORS 12
|
||||||
|
#define ATA_IDENT_SERIAL 20
|
||||||
|
#define ATA_IDENT_MODEL 54
|
||||||
|
#define ATA_IDENT_CAPABILITIES 98
|
||||||
|
#define ATA_IDENT_FIELDVALID 106
|
||||||
|
#define ATA_IDENT_MAX_LBA 120
|
||||||
|
#define ATA_IDENT_COMMANDSETS 164
|
||||||
|
#define ATA_IDENT_MAX_LBA_EXT 200
|
||||||
|
|
||||||
|
#define IDE_ATA 0x00
|
||||||
|
#define IDE_ATAPI 0x01
|
||||||
|
|
||||||
|
#define ATA_MASTER 0x00
|
||||||
|
#define ATA_SLAVE 0x01
|
||||||
|
|
||||||
|
|
||||||
|
#define ATA_REG_DATA 0x00
|
||||||
|
#define ATA_REG_ERROR 0x01
|
||||||
|
#define ATA_REG_FEATURES 0x01
|
||||||
|
#define ATA_REG_SECCOUNT0 0x02
|
||||||
|
#define ATA_REG_LBA0 0x03
|
||||||
|
#define ATA_REG_LBA1 0x04
|
||||||
|
#define ATA_REG_LBA2 0x05
|
||||||
|
#define ATA_REG_HDDEVSEL 0x06
|
||||||
|
#define ATA_REG_COMMAND 0x07
|
||||||
|
#define ATA_REG_STATUS 0x07
|
||||||
|
#define ATA_REG_SECCOUNT1 0x08
|
||||||
|
#define ATA_REG_LBA3 0x09
|
||||||
|
#define ATA_REG_LBA4 0x0A
|
||||||
|
#define ATA_REG_LBA5 0x0B
|
||||||
|
#define ATA_REG_CONTROL 0x0C
|
||||||
|
#define ATA_REG_ALTSTATUS 0x0C
|
||||||
|
#define ATA_REG_DEVADDRESS 0x0D
|
||||||
|
|
||||||
|
// Channels:
|
||||||
|
#define ATA_PRIMARY 0x00
|
||||||
|
#define ATA_SECONDARY 0x01
|
||||||
|
|
||||||
|
// Directions:
|
||||||
|
#define ATA_READ 0x00
|
||||||
|
#define ATA_WRITE 0x01
|
||||||
|
|
||||||
|
|
||||||
|
// Status
|
||||||
|
#define ATA_SR_BSY 0x80 // Busy
|
||||||
|
#define ATA_SR_DRDY 0x40 // Drive ready
|
||||||
|
#define ATA_SR_DF 0x20 // Drive write fault
|
||||||
|
#define ATA_SR_DSC 0x10 // Drive seek complete
|
||||||
|
#define ATA_SR_DRQ 0x08 // Data request ready
|
||||||
|
#define ATA_SR_CORR 0x04 // Corrected data
|
||||||
|
#define ATA_SR_IDX 0x02 // Index
|
||||||
|
#define ATA_SR_ERR 0x01 // Error
|
||||||
|
|
||||||
|
|
||||||
|
// Errors
|
||||||
|
#define ATA_ER_BBK 0x80 // Bad block
|
||||||
|
#define ATA_ER_UNC 0x40 // Uncorrectable data
|
||||||
|
#define ATA_ER_MC 0x20 // Media changed
|
||||||
|
#define ATA_ER_IDNF 0x10 // ID mark not found
|
||||||
|
#define ATA_ER_MCR 0x08 // Media change request
|
||||||
|
#define ATA_ER_ABRT 0x04 // Command aborted
|
||||||
|
#define ATA_ER_TK0NF 0x02 // Track 0 not found
|
||||||
|
#define ATA_ER_AMNF 0x01 // No address mark
|
29
src/kernel/ide/sampleIDE.definitions.h
Normal file
29
src/kernel/ide/sampleIDE.definitions.h
Normal file
@ -0,0 +1,29 @@
|
|||||||
|
#pragma once
|
||||||
|
|
||||||
|
struct IDEChannelRegisters{
|
||||||
|
unsigned short base; // I/O Base.
|
||||||
|
unsigned short ctrl; // Control Base
|
||||||
|
unsigned short bmide; // Bus Master IDE
|
||||||
|
unsigned char nIEN; // IEN (no interrupt)
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
struct IDE_DEVICE {
|
||||||
|
unsigned char Reserved; // 0 (Empty) or 1 (This device exists).
|
||||||
|
unsigned char Channel; // 0 (Primary Channel) or 1 (Secondary Channel).
|
||||||
|
unsigned char Drive; // 0 (Master Drive) or 1 (Slave Drive).
|
||||||
|
unsigned short Type; // 0 ATA, 1:ATAPI
|
||||||
|
unsigned short Signature; // Drive Signature
|
||||||
|
unsigned short Capabilities; // Features.
|
||||||
|
unsigned int CommandSets; // Command Sets Supported.
|
||||||
|
unsigned int Size; // Size in Sectors (NOTE: Seems unused nowadays as i've only seen the value be zero
|
||||||
|
unsigned char Model[41]; // Model in string.
|
||||||
|
} ;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
extern IDEChannelRegisters channels[2];
|
||||||
|
extern IDE_DEVICE ide_devices[4];
|
||||||
|
extern unsigned char ide_buf[2048];
|
||||||
|
extern unsigned char ide_irq_invoked;
|
||||||
|
extern unsigned char atapi_packet[12];
|
241
src/kernel/ide/sampleIDE.h
Normal file
241
src/kernel/ide/sampleIDE.h
Normal file
@ -0,0 +1,241 @@
|
|||||||
|
#pragma once
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "../tty/kterm.h"
|
||||||
|
#include "sampleIDE.definitions.h"
|
||||||
|
#include "ideCommands.h"
|
||||||
|
|
||||||
|
void Detect_IO_Ports(uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4);
|
||||||
|
void DetectDevices();
|
||||||
|
|
||||||
|
unsigned char ide_buf[2048] = {0};
|
||||||
|
unsigned char ide_irq_invoked = 0;
|
||||||
|
unsigned char atapi_packet[12] = {0xA8,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||||
|
|
||||||
|
void wait(int t){
|
||||||
|
volatile int i,j;
|
||||||
|
for(i=0;i<t;i++)
|
||||||
|
for(j=0;j<25000;j++)
|
||||||
|
asm("NOP");
|
||||||
|
}
|
||||||
|
|
||||||
|
void ide_write(unsigned char channel, unsigned char reg, unsigned char data){
|
||||||
|
if (reg > 0x07 && reg < 0x0C)
|
||||||
|
ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
|
||||||
|
if (reg < 0x08)
|
||||||
|
outb(channels[channel].base + reg - 0x00, data);
|
||||||
|
else if (reg < 0x0C)
|
||||||
|
outb(channels[channel].base + reg - 0x06, data);
|
||||||
|
else if (reg < 0x0E)
|
||||||
|
outb(channels[channel].ctrl + reg - 0x0A, data);
|
||||||
|
else if (reg < 0x16)
|
||||||
|
outb(channels[channel].bmide + reg - 0x0E, data);
|
||||||
|
if (reg > 0x07 && reg < 0x0C)
|
||||||
|
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned char ide_read(unsigned char channel, unsigned char reg){
|
||||||
|
unsigned char result;
|
||||||
|
if( reg > 0x07 && reg < 0x0C)
|
||||||
|
ide_write(channel,ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
|
||||||
|
if( reg < 0x08)
|
||||||
|
result = inb(channels[channel].base + reg - 0x00);
|
||||||
|
else if (reg < 0x0C)
|
||||||
|
result = inb(channels[channel].base + reg - 0x06);
|
||||||
|
else if (reg < 0x0E)
|
||||||
|
result = inb(channels[channel].ctrl + reg - 0x0A);
|
||||||
|
else if (reg < 0x16)
|
||||||
|
result = inb(channels[channel].bmide + reg - 0x0E);
|
||||||
|
if (reg > 0x07 && reg < 0x0C)
|
||||||
|
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
|
||||||
|
return result;
|
||||||
|
}
|
||||||
|
|
||||||
|
void ide_read_buffer(unsigned char channel, unsigned char reg, unsigned int buffer, unsigned int quads){
|
||||||
|
if (reg > 0x07 && reg < 0x0C)
|
||||||
|
ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
|
||||||
|
if (reg < 0x08)
|
||||||
|
insl(channels[channel].base + reg - 0x00, (void *)buffer, quads);
|
||||||
|
else if (reg < 0x0C)
|
||||||
|
insl(channels[channel].base + reg - 0x06, (void *)buffer, quads);
|
||||||
|
else if (reg < 0x0E)
|
||||||
|
insl(channels[channel].ctrl + reg - 0x0A, (void *)buffer, quads);
|
||||||
|
else if (reg < 0x16)
|
||||||
|
insl(channels[channel].bmide + reg - 0x0E, (void *)buffer, quads);
|
||||||
|
if (reg > 0x07 && reg < 0x0C)
|
||||||
|
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned char ide_polling(unsigned char channel, unsigned int advanced_check) {
|
||||||
|
|
||||||
|
// (I) Delay 400 nanosecond for BSY to be set:
|
||||||
|
// -------------------------------------------------
|
||||||
|
for(int i = 0; i < 4; i++)
|
||||||
|
ide_read(channel, ATA_REG_ALTSTATUS); // Reading the Alternate Status port wastes 100ns; loop four times.
|
||||||
|
|
||||||
|
// (II) Wait for BSY to be cleared:
|
||||||
|
// -------------------------------------------------
|
||||||
|
while (ide_read(channel, ATA_REG_STATUS) & ATA_SR_BSY)
|
||||||
|
; // Wait for BSY to be zero.
|
||||||
|
|
||||||
|
if (advanced_check) {
|
||||||
|
unsigned char state = ide_read(channel, ATA_REG_STATUS); // Read Status Register.
|
||||||
|
|
||||||
|
// (III) Check For Errors:
|
||||||
|
// -------------------------------------------------
|
||||||
|
if (state & ATA_SR_ERR)
|
||||||
|
return 2; // Error.
|
||||||
|
|
||||||
|
// (IV) Check If Device fault:
|
||||||
|
// -------------------------------------------------
|
||||||
|
if (state & ATA_SR_DF)
|
||||||
|
return 1; // Device Fault.
|
||||||
|
|
||||||
|
// (V) Check DRQ:
|
||||||
|
// -------------------------------------------------
|
||||||
|
// BSY = 0; DF = 0; ERR = 0 so we should check for DRQ now.
|
||||||
|
if ((state & ATA_SR_DRQ) == 0)
|
||||||
|
return 3; // DRQ should be set
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0; // No Error.
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned char ide_print_error(unsigned int drive, unsigned char err) {
|
||||||
|
if (err == 0)
|
||||||
|
return err;
|
||||||
|
|
||||||
|
printf("IDE:");
|
||||||
|
if (err == 1) {printf("- Device Fault\n "); err = 19;}
|
||||||
|
else if (err == 2) {
|
||||||
|
unsigned char st = ide_read(ide_devices[drive].Channel, ATA_REG_ERROR);
|
||||||
|
if (st & ATA_ER_AMNF) {printf("- No Address Mark Found\n "); err = 7;}
|
||||||
|
if (st & ATA_ER_TK0NF) {printf("- No Media or Media Error\n "); err = 3;}
|
||||||
|
if (st & ATA_ER_ABRT) {printf("- Command Aborted\n "); err = 20;}
|
||||||
|
if (st & ATA_ER_MCR) {printf("- No Media or Media Error\n "); err = 3;}
|
||||||
|
if (st & ATA_ER_IDNF) {printf("- ID mark not Found\n "); err = 21;}
|
||||||
|
if (st & ATA_ER_MC) {printf("- No Media or Media Error\n "); err = 3;}
|
||||||
|
if (st & ATA_ER_UNC) {printf("- Uncorrectable Data Error\n "); err = 22;}
|
||||||
|
if (st & ATA_ER_BBK) {printf("- Bad Sectors\n "); err = 13;}
|
||||||
|
} else if (err == 3) {printf("- Reads Nothing\n "); err = 23;}
|
||||||
|
else if (err == 4) {printf("- Write Protected\n "); err = 8;}
|
||||||
|
printf("- [%s %s] %s\n",
|
||||||
|
(const char *[]){"Primary", "Secondary"}[ide_devices[drive].Channel], // Use the channel as an index into the array
|
||||||
|
(const char *[]){"Master", "Slave"}[ide_devices[drive].Drive], // Same as above, using the drive
|
||||||
|
ide_devices[drive].Model);
|
||||||
|
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
inline void init_IDE( uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4)
|
||||||
|
{
|
||||||
|
Detect_IO_Ports( BAR0, BAR1, BAR2, BAR3, BAR4);
|
||||||
|
|
||||||
|
printf("ATA Primary port, base: 0x%x, ctrl: 0x%x\n", channels[ATA_PRIMARY].base , channels[ATA_PRIMARY].ctrl);
|
||||||
|
printf("ATA Secondary port, base: 0x%x, ctrl: 0x%x\n", channels[ATA_SECONDARY].base , channels[ATA_SECONDARY].ctrl);
|
||||||
|
|
||||||
|
// 2- Disable IRQs:
|
||||||
|
ide_write(ATA_PRIMARY , ATA_REG_CONTROL, 2);
|
||||||
|
ide_write(ATA_SECONDARY, ATA_REG_CONTROL, 2);
|
||||||
|
|
||||||
|
DetectDevices();
|
||||||
|
|
||||||
|
// 4- Print Summary:
|
||||||
|
for (int i = 0; i < 4; i++)
|
||||||
|
if (ide_devices[i].Reserved == 1) {
|
||||||
|
printf(" Found %s Drive %d bytes - %x\n",
|
||||||
|
(const char *[]){"ATA", "ATAPI"}[ide_devices[i].Type], /* Type */
|
||||||
|
ide_devices[i].Size / 2, /* Size */
|
||||||
|
ide_devices[i].Model);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
// 3- Detect ATA-ATAPI Devices:
|
||||||
|
void DetectDevices(){
|
||||||
|
int i, j, k, count = 0;
|
||||||
|
|
||||||
|
for (i = 0; i < 2; i++)
|
||||||
|
for (j = 0; j < 2; j++) {
|
||||||
|
|
||||||
|
unsigned char err = 0, type = IDE_ATA, status;
|
||||||
|
ide_devices[count].Reserved = 0; // Assuming that no drive here.
|
||||||
|
|
||||||
|
// (I) Select Drive:
|
||||||
|
ide_write(i, ATA_REG_HDDEVSEL, 0xA0 | (j << 4)); // Select Drive.
|
||||||
|
wait(1000); // Wait 1ms for drive select to work.
|
||||||
|
|
||||||
|
// (II) Send ATA Identify Command:
|
||||||
|
ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY);
|
||||||
|
wait(1000);
|
||||||
|
|
||||||
|
// (III) Polling:
|
||||||
|
if (ide_read(i, ATA_REG_STATUS) == 0) continue; // If Status = 0, No Device.
|
||||||
|
|
||||||
|
while(1) {
|
||||||
|
status = ide_read(i, ATA_REG_STATUS);
|
||||||
|
if ((status & ATA_SR_ERR)) {err = 1; break;} // If Err, Device is not ATA.
|
||||||
|
if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRQ)) break; // Everything is right.
|
||||||
|
}
|
||||||
|
|
||||||
|
// (IV) Probe for ATAPI Devices:
|
||||||
|
if (err != 0) {
|
||||||
|
unsigned char cl = ide_read(i, ATA_REG_LBA1);
|
||||||
|
unsigned char ch = ide_read(i, ATA_REG_LBA2);
|
||||||
|
|
||||||
|
if (cl == 0x14 && ch ==0xEB)
|
||||||
|
type = IDE_ATAPI;
|
||||||
|
else if (cl == 0x69 && ch == 0x96)
|
||||||
|
type = IDE_ATAPI;
|
||||||
|
else
|
||||||
|
continue; // Unknown Type (may not be a device).
|
||||||
|
|
||||||
|
ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY_PACKET);
|
||||||
|
wait(1000);
|
||||||
|
}
|
||||||
|
|
||||||
|
// (V) Read Identification Space of the Device:
|
||||||
|
ide_read_buffer(i, ATA_REG_DATA, (unsigned int) ide_buf, 128);
|
||||||
|
|
||||||
|
// (VI) Read Device Parameters:
|
||||||
|
ide_devices[count].Reserved = 1;
|
||||||
|
ide_devices[count].Type = type;
|
||||||
|
ide_devices[count].Channel = i;
|
||||||
|
ide_devices[count].Drive = j;
|
||||||
|
ide_devices[count].Signature = *((unsigned short *)(ide_buf + ATA_IDENT_DEVICETYPE));
|
||||||
|
ide_devices[count].Capabilities = *((unsigned short *)(ide_buf + ATA_IDENT_CAPABILITIES));
|
||||||
|
ide_devices[count].CommandSets = *((unsigned int *)(ide_buf + ATA_IDENT_COMMANDSETS));
|
||||||
|
|
||||||
|
// (VII) Get Size:
|
||||||
|
if (ide_devices[count].CommandSets & (1 << 26))
|
||||||
|
// Device uses 48-Bit Addressing:
|
||||||
|
ide_devices[count].Size = *((unsigned int *)(ide_buf + ATA_IDENT_MAX_LBA_EXT));
|
||||||
|
else
|
||||||
|
// Device uses CHS or 28-bit Addressing:
|
||||||
|
ide_devices[count].Size = *((unsigned int *)(ide_buf + ATA_IDENT_MAX_LBA));
|
||||||
|
|
||||||
|
// (VIII) String indicates model of device (like Western Digital HDD and SONY DVD-RW...):
|
||||||
|
for(k = 0; k < 40; k += 2) {
|
||||||
|
ide_devices[count].Model[k] = ide_buf[ATA_IDENT_MODEL + k + 1];
|
||||||
|
ide_devices[count].Model[k + 1] = ide_buf[ATA_IDENT_MODEL + k];}
|
||||||
|
ide_devices[count].Model[40] = 0; // Terminate String.
|
||||||
|
|
||||||
|
count++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void Detect_IO_Ports(uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4){
|
||||||
|
// 1 Detect I/O Ports which interface an IDE Controller
|
||||||
|
|
||||||
|
// Based on the implementation within serenity
|
||||||
|
channels[ATA_PRIMARY].base = (BAR0 == 0x1 || BAR0 == 0x0) ? 0x1F0 : BAR0 & (~1);
|
||||||
|
channels[ATA_PRIMARY ].ctrl = (BAR1 == 0x1 || BAR1 == 0x0) ? 0x3F6 : BAR1 & (~1);
|
||||||
|
channels[ATA_SECONDARY].base = (BAR2 == 0x1 || BAR2 == 0x0) ? 0x170 : BAR2 & (~1);
|
||||||
|
channels[ATA_SECONDARY].ctrl = (BAR3 == 0x1 || BAR3 == 0x0) ? 0x376 : BAR3 & (~1);
|
||||||
|
channels[ATA_PRIMARY ].bmide = (BAR4 & (~1)) + 0; // Bus Master IDE
|
||||||
|
channels[ATA_SECONDARY].bmide = (BAR4 & (~1)) + 8; // Bus Master IDE
|
||||||
|
|
||||||
|
}
|
@ -12,9 +12,10 @@ unsigned short inw_p(unsigned short ){
|
|||||||
// TODO: implement me!
|
// TODO: implement me!
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
unsigned int inl(unsigned short ){
|
uint32_t inl( int port ){
|
||||||
// TODO: implement me!
|
unsigned int data;
|
||||||
return 0;
|
asm volatile ("inl %w1, %0": "=a" (data): "d" (port));
|
||||||
|
return data;
|
||||||
}
|
}
|
||||||
unsigned int inl_p(unsigned short ){
|
unsigned int inl_p(unsigned short ){
|
||||||
// TODO: implement me!
|
// TODO: implement me!
|
||||||
@ -31,9 +32,12 @@ void outw(unsigned short , unsigned short ){
|
|||||||
void outw_p(unsigned short , unsigned short ){
|
void outw_p(unsigned short , unsigned short ){
|
||||||
|
|
||||||
}
|
}
|
||||||
void outl(unsigned int , unsigned short ){
|
|
||||||
|
|
||||||
|
void outl( int port , uint32_t data ){
|
||||||
|
asm volatile ("outl %0, %1" :: "a" (data), "dn"(port));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void outl_p(unsigned int , unsigned short ){
|
void outl_p(unsigned int , unsigned short ){
|
||||||
|
|
||||||
}
|
}
|
||||||
|
@ -12,21 +12,17 @@ static inline uint8_t inb(uint16_t port)
|
|||||||
unsigned char inb_p(unsigned short port);
|
unsigned char inb_p(unsigned short port);
|
||||||
unsigned short inw(unsigned short port);
|
unsigned short inw(unsigned short port);
|
||||||
unsigned short inw_p(unsigned short port);
|
unsigned short inw_p(unsigned short port);
|
||||||
unsigned int inl(unsigned short port);
|
uint32_t inl( int port );
|
||||||
unsigned int inl_p(unsigned short port);
|
unsigned int inl_p(unsigned short port);
|
||||||
|
|
||||||
static inline void outb(uint16_t port, uint8_t val)
|
static inline void outb(uint16_t port, uint8_t val)
|
||||||
{
|
{
|
||||||
asm volatile ( "outb %0, %1" : : "a"(val), "Nd"(port) );
|
asm volatile ( "outb %0, %1" : : "a"(val), "Nd"(port) );
|
||||||
/* There's an outb %al, $imm8 encoding, for compile-time constant port numbers that fit in 8b. (N constraint).
|
|
||||||
* Wider immediate constants would be truncated at assemble-time (e.g. "i" constraint).
|
|
||||||
* The outb %al, %dx encoding is the only option for all other cases.
|
|
||||||
* %1 expands to %dx because port is a uint16_t. %w1 could be used if we had the port number a wider C type */
|
|
||||||
}
|
}
|
||||||
void outb_p(unsigned char value, unsigned short port);
|
void outb_p(unsigned char value, unsigned short port);
|
||||||
void outw(unsigned short value, unsigned short port);
|
void outw(unsigned short value, unsigned short port);
|
||||||
void outw_p(unsigned short value, unsigned short port);
|
void outw_p(unsigned short value, unsigned short port);
|
||||||
void outl(unsigned int value, unsigned short port);
|
void outl( int port , uint32_t data );
|
||||||
void outl_p(unsigned int value, unsigned short port);
|
void outl_p(unsigned int value, unsigned short port);
|
||||||
|
|
||||||
void insb(unsigned short port, void *addr,
|
void insb(unsigned short port, void *addr,
|
||||||
|
@ -1,15 +1,20 @@
|
|||||||
#include "kernel.h"
|
#include "kernel.h"
|
||||||
#define GB4 524288
|
#define GB4 524288
|
||||||
#define GB2 262144
|
#define GB2 262144
|
||||||
|
|
||||||
|
int memcmp( const void* ptr1, const void* ptr2, size_t num);
|
||||||
|
|
||||||
|
extern "C" void kernel_main (void);
|
||||||
|
|
||||||
extern "C" void early_main(unsigned long magic, unsigned long addr){
|
extern "C" void early_main(unsigned long magic, unsigned long addr){
|
||||||
/** initialize terminal interface */
|
/** initialize terminal interface */
|
||||||
kterm_init();
|
kterm_init();
|
||||||
|
|
||||||
if (magic != MULTIBOOT_BOOTLOADER_MAGIC){
|
if (magic != MULTIBOOT_BOOTLOADER_MAGIC){
|
||||||
printf("Invalid magic number: 0x%x\n", magic);
|
printf("Invalid magic number: 0x%x\n", magic);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
CheckMBT( (multiboot_info_t *) addr);
|
CheckMBT( (multiboot_info_t *) addr);
|
||||||
|
|
||||||
multiboot_info_t* mbt = (multiboot_info_t*) addr;
|
multiboot_info_t* mbt = (multiboot_info_t*) addr;
|
||||||
@ -27,14 +32,72 @@
|
|||||||
}
|
}
|
||||||
|
|
||||||
initGDT();
|
initGDT();
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
kernel_main();
|
||||||
|
}
|
||||||
|
|
||||||
|
int memcmp( const void* ptr1, const void* ptr2, size_t num)
|
||||||
|
{
|
||||||
|
const unsigned char * cs = (const unsigned char*) ptr1;
|
||||||
|
const unsigned char * ct = (const unsigned char*) ptr2;
|
||||||
|
|
||||||
|
|
||||||
|
for (int i = 0 ; i < num ; i++, cs++, ct++ ){
|
||||||
|
if( *cs < *ct){
|
||||||
|
return -1;
|
||||||
|
} else if( *cs > *ct){
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void kernel_main (void) {
|
extern "C" void kernel_main (void) {
|
||||||
|
|
||||||
printf("call to init serial\n");
|
printf("call to init serial\n");
|
||||||
init_serial();
|
init_serial();
|
||||||
|
print_serial("Serial port initialized!");
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
// Enumerate the PCI bus
|
||||||
|
PCI_Enumerate();
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
TestIDEController();
|
||||||
|
|
||||||
|
int devNumber = 0 ;
|
||||||
|
for ( auto device : ide_devices){
|
||||||
|
if (!device.Reserved)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
|
||||||
|
printf("Device %d\n" , devNumber);
|
||||||
|
printf (" Device on Channel: (0x%x) %s\n" ,device.Channel, device.Channel == 0 ? "Primary" : "Secondary");
|
||||||
|
printf (" Device drive:(0x%x) %s\n" , device.Drive, device.Drive? "Slave" : "Master");
|
||||||
|
printf (" Device Type:(0x%x) %s\n" , device.Type, device.Type ? "ATAPI" : "ATA");
|
||||||
|
devNumber ++;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
// ATAPI_DEVICE::isPacketDevice();
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
ATAPI_DEVICE::Identify(ATA_SECONDARY, DEVICE_DRIVE::MASTER);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
while (true){
|
while (true){
|
||||||
//Read time indefinetely
|
//Read time indefinetely
|
||||||
|
@ -2,6 +2,8 @@
|
|||||||
extern "C"{
|
extern "C"{
|
||||||
#include "../libc/include/string.h"
|
#include "../libc/include/string.h"
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
#include "vga/VBE.h"
|
#include "vga/VBE.h"
|
||||||
#include "tty/kterm.h"
|
#include "tty/kterm.h"
|
||||||
|
|
||||||
@ -16,6 +18,11 @@ extern "C"{
|
|||||||
#include "time.h"
|
#include "time.h"
|
||||||
#include "cpu.h"
|
#include "cpu.h"
|
||||||
#include "serial.h"
|
#include "serial.h"
|
||||||
|
#include "pci.h"
|
||||||
|
#include "ide/ide.h"
|
||||||
|
#include "drivers/atapi/atapiDevice.h"
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#define CHECK_FLAG(flags, bit) ((flags) & (1 <<(bit)))
|
#define CHECK_FLAG(flags, bit) ((flags) & (1 <<(bit)))
|
||||||
#define PANIC(message) { return; }
|
#define PANIC(message) { return; }
|
||||||
|
@ -1,108 +1,247 @@
|
|||||||
#include "pci.h"
|
#include "pci.h"
|
||||||
|
|
||||||
uint16_t ConfigReadWord (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset){
|
#define PCI_BUS_ADDR_SHIFT 16
|
||||||
|
#define PCI_DEVICE_ADDR_SHIFT 11
|
||||||
|
#define PCI_FUNCTION_ADDR_SHIFT 8
|
||||||
|
#define PCI_ENABLE_ADDR_SHIFT 31
|
||||||
|
|
||||||
|
const char* GetClassCodeName (uint64_t ClassCode ) {
|
||||||
|
|
||||||
|
switch (ClassCode)
|
||||||
|
{
|
||||||
|
case 0x0 :
|
||||||
|
return "Unclassified";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x1:
|
||||||
|
return "Mass Storage Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x2:
|
||||||
|
return "Network Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x3:
|
||||||
|
return "Display Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x4:
|
||||||
|
return "Multimedia Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x5:
|
||||||
|
return "Memory Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x6:
|
||||||
|
return "Bridge";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x7 :
|
||||||
|
return "Simple Communication Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x8:
|
||||||
|
return "Base System Peripheral";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x9:
|
||||||
|
return "Input Device Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0xA:
|
||||||
|
return "Docking station";
|
||||||
|
break;
|
||||||
|
case 0xB:
|
||||||
|
return "Processor";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0xC:
|
||||||
|
return "Serial Bus Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0xD:
|
||||||
|
return "Wireless Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0xE:
|
||||||
|
return "Intelligent Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0xF:
|
||||||
|
return "Satellite Communication Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x10:
|
||||||
|
return "Encryption Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x11:
|
||||||
|
return "Signal Processing Controller";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x12:
|
||||||
|
return "Processing Accelerator";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x13:
|
||||||
|
return "Non-Essential Instrumentation";
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
return "Unknown";
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
const char* getVendor( uint32_t VendorID){
|
||||||
|
switch (VendorID)
|
||||||
|
{
|
||||||
|
case 0x8086:
|
||||||
|
return "Intel Corporation";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x10DE:
|
||||||
|
return "NVIDIA Corporation";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x1022:
|
||||||
|
return "Advanced Micro Devices, Inc.[AMD]";
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x1002:
|
||||||
|
return "Advanced Micor Devices, Inc.[AMD/ATI]";
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
return "Vendor Unkown";
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t ConfigReadWord ( PCIBusAddress& PCIDeviceAddress , uint8_t offset){
|
||||||
|
outl(CONFIG_ADDRESS , PCIDeviceAddress.getAddress() | offset );
|
||||||
|
return inl(CONFIG_DATA);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offset){
|
||||||
uint32_t address;
|
uint32_t address;
|
||||||
uint32_t lbus = (uint32_t) bus;
|
|
||||||
uint32_t lslot = (uint32_t) slot;
|
|
||||||
uint32_t lfunc = (uint32_t) func;
|
|
||||||
uint16_t tmp = 0;
|
|
||||||
|
|
||||||
/* Create configuration address as per Figure 1 */
|
address = (uint32_t) (
|
||||||
address = (uint32_t) ((lbus << 16) | (lslot << 11) | (lfunc << 8) | (offset & 0xFC) |((uint32_t) 0x80000000) );
|
((uint32_t) 1 << PCI_ENABLE_ADDR_SHIFT) |
|
||||||
/*write out the address */
|
((uint32_t)bus << PCI_BUS_ADDR_SHIFT) |
|
||||||
|
((uint32_t)device << PCI_DEVICE_ADDR_SHIFT) |
|
||||||
|
((uint32_t)func << PCI_FUNCTION_ADDR_SHIFT) |
|
||||||
|
offset );
|
||||||
|
|
||||||
outl(CONFIG_ADDRESS, address);
|
outl(CONFIG_ADDRESS, address);
|
||||||
/* read in the data */
|
|
||||||
/* (offset & 2 ) * 8 ) = o will choosse the first word of the 32 bits register*/
|
|
||||||
tmp = (uint16_t)((inl(CONFIG_DATA)) >> ((offset & 2) * 8) & 0xFFFF);
|
return inl(CONFIG_DATA);
|
||||||
return (tmp);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
uint16_t CheckVendor (uint8_t bus, uint8_t slot) {
|
uint8_t GetHeaderType( PCIBusAddress& PCIDeviceAddress ){
|
||||||
uint16_t vendor, device;
|
uint32_t header_information = ConfigReadWord(PCIDeviceAddress , 0xC);
|
||||||
/*
|
return (uint8_t) (
|
||||||
Try and read the first configuration register. Since there ar no
|
((header_information >> 16) //Get higher half
|
||||||
vendors that == 0xFFFF, it must be a non-existent device.
|
& 0x00FF) // Select the last two bytes
|
||||||
*/
|
& 0x7F ); // Mask bit 7 as it indicates if the device is a mulit function device!
|
||||||
if((vendor = ConfigReadWord(bus, slot, 0,0)) != 0xFFFF) {
|
|
||||||
device = ConfigReadWord(bus, slot, 0,2);
|
|
||||||
// Possible read more config values ...
|
|
||||||
} return (vendor);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void checkDevice (uint8_t bus, uint8_t device ) {
|
uint16_t GetClassCodes( PCIBusAddress& PCIDeviceAddress ){
|
||||||
uint8_t function = 0;
|
uint32_t classcodes = ConfigReadWord(PCIDeviceAddress, 0x8);
|
||||||
|
return (uint16_t)((uint32_t)classcodes >> 16);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
uint16_t vendorID = CheckVendor(bus, device);
|
bool IsMultiFunctionDevice(PCIBusAddress& PCIDeviceAddress){
|
||||||
if (vendorID == 0xFFFF) {
|
uint32_t header_information = ConfigReadWord(PCIDeviceAddress, 0xC);
|
||||||
return;
|
return (((header_information>>16)
|
||||||
}
|
& 0x80)
|
||||||
|
>> 7 );
|
||||||
|
}
|
||||||
|
|
||||||
checkFunction (bus, device, function );
|
void PrintPCIDeviceInfo (PCIBusAddress& PCIDeviceAddress)
|
||||||
headerType = getHeaderType(bus, device, function );
|
{
|
||||||
if( (headerType & 0x80) != 0) {
|
uint32_t DeviceID = (GetDevice(PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function) >> 16);
|
||||||
/* It is a multi-function device, so check remaining functions */
|
uint32_t VendorID = GetDevice(PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function) & 0xFFFF;
|
||||||
for (function = 1; function < 8; function++){
|
printf("Device found!\n");
|
||||||
if (CheckVendor(bus, device)!= 0xFFFF){
|
printf("Bus: %d, Device: %d, function: %d \n", PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function);
|
||||||
checkFunction(bus, device, function );
|
printf("DeviceID: 0x%x, Vendor: %s\n",
|
||||||
}
|
DeviceID
|
||||||
}
|
, getVendor(VendorID) );
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
uint8_t header_type = GetHeaderType(PCIDeviceAddress);
|
||||||
|
printf( "Header type: 0x%x\n", header_type);
|
||||||
|
|
||||||
|
uint16_t deviceClasses = GetClassCodes(PCIDeviceAddress);
|
||||||
|
printf("class: %s, subClass: %d\n\n", GetClassCodeName((deviceClasses >>8)), deviceClasses & 0xFF);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void PCI_Enumerate(){
|
||||||
|
int devicesFound = 0;
|
||||||
|
// loop through all possible busses, devices and their functions;
|
||||||
|
for( int bus = 0 ; bus < 256 ; bus++)
|
||||||
|
{
|
||||||
|
|
||||||
|
for(int device = 0; device < 32 ; device ++)
|
||||||
|
{
|
||||||
|
|
||||||
|
|
||||||
|
int function = 0;
|
||||||
|
|
||||||
void checkFunction (uint8_t bus, uint8_t device, uint8_t function ){
|
//uint64_t DeviceIdentify = ConfigReadWord(bus, device, function,0x0);
|
||||||
uint8_t baseClass;
|
uint32_t DeviceID = GetDevice(bus, device, function) >> 16;
|
||||||
uint8_t subClass;
|
|
||||||
uint8_t secondaryBus;
|
|
||||||
|
|
||||||
baseClass = getBaseClass(bus, device, function);
|
|
||||||
subClass = getSubClass (bus, device, function );
|
|
||||||
if ( (baseClass == 0x06) && (subClass == 0x04)){
|
if( DeviceID != 0xFFFF){
|
||||||
secondaryBus = getSecondaryBus(bus,device, function);
|
PCIBusAddress busAddress =
|
||||||
checkBus(secondaryBus);
|
PCIBusAddress{bus, device, function };
|
||||||
}
|
|
||||||
}
|
PrintPCIDeviceInfo(busAddress);
|
||||||
|
|
||||||
|
// iterate over the functions if it is a multi function device!
|
||||||
|
if( IsMultiFunctionDevice(busAddress) ){
|
||||||
|
printf("Multi function device! \n");
|
||||||
|
printf("Check remaining Functions\n");
|
||||||
|
for ( function = 1 ; function < 8; function++)
|
||||||
|
{
|
||||||
|
uint32_t DeviceID = GetDevice(bus, device, function) >> 16;
|
||||||
|
|
||||||
|
if( DeviceID != 0xFFFF){
|
||||||
|
PCIBusAddress busAddress2 = PCIBusAddress{bus, device, function};
|
||||||
|
PrintPCIDeviceInfo(busAddress2);
|
||||||
|
devicesFound++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
// Brute-force scan
|
|
||||||
void checkAllBuses (){
|
|
||||||
uint16_t bus;
|
|
||||||
uint8_t device;
|
|
||||||
|
|
||||||
for(bus = 0; bus < 256; bus++){
|
|
||||||
for(device = 0; device < 32; device++){
|
|
||||||
checkDevice(bus,device);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
// Recursive scan
|
devicesFound++;
|
||||||
void checkBus (uint8_t bus){
|
}
|
||||||
uint8_t device;
|
|
||||||
|
|
||||||
for(device = 0; device < 32; device ++){
|
|
||||||
checkDevice(bus,device);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void checkAllBuses(){
|
|
||||||
uint8_t function;
|
|
||||||
uint8_t bus;
|
|
||||||
|
|
||||||
headerType = getHeaderType(0,0,0);
|
|
||||||
if ( (headerType & 0x80) == 0 ){
|
|
||||||
/* Single PCI host controller */
|
|
||||||
checkBus(0);
|
|
||||||
} else{
|
|
||||||
/* Multiple PCI host controllers */
|
|
||||||
for (function = 0; function < 8; function++){
|
|
||||||
if( CheckVendor(0,0) != 0xFFFF) {
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
bus = function;
|
|
||||||
checkBus(bus);
|
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
|
printf("Found %d PCI devices!\n", devicesFound);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t GetProgIF (PCIBusAddress& PCIDeviceAddress){
|
||||||
|
uint32_t data = ConfigReadWord(PCIDeviceAddress, 0x8);
|
||||||
|
return ((data >> 8) & 0xFF);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t ReadBAR ( PCIBusAddress& PCIDeviceAddress, int bar_number){
|
||||||
|
int offsetToBar = 0x10 + (bar_number* 0x4);
|
||||||
|
return ConfigReadWord(PCIDeviceAddress, offsetToBar);
|
||||||
}
|
}
|
@ -1,58 +1,38 @@
|
|||||||
#pragma once
|
#pragma once
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
#include "io.h"
|
#include "io.h"
|
||||||
|
#include "tty/kterm.h"
|
||||||
|
#include "pci/pciDevice.h"
|
||||||
|
|
||||||
// Configuration Space Access Mechanism #1
|
// Configuration Space Access Mechanism #1
|
||||||
#define CONFIG_ADDRESS 0xCF8 // Configuration adress that is to be accessed
|
#define CONFIG_ADDRESS 0xCF8 // Configuration adress that is to be accessed
|
||||||
#define CONFIG_DATA 0xCFC // Will do the actual configuration operation
|
#define CONFIG_DATA 0xCFC // Will do the actual configuration operation
|
||||||
|
|
||||||
/*
|
extern const char* ClassCodeTable [0x13];
|
||||||
CONFIG_ADDRESS
|
|
||||||
|
|
||||||
32 bit register
|
|
||||||
|
|
||||||
bit 31 Enable bit (Should CONFIG_DATA be translatedc to configuration cycles)
|
|
||||||
bit 30 - 24 Reserved
|
|
||||||
bit 23 - 16 Bus Number (Choose a specific PCI BUS)
|
|
||||||
bit 15 - 11 Device Number (Selects specific device one the pci bus)
|
|
||||||
bit 10 - 8 Function Number (Selects a specific function in a device)
|
|
||||||
bit 7 - 0 Register Offset (Offset in the configuration space of 256 Bytes ) NOTE: lowest two bits will always be zero
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
PCI Device structure
|
|
||||||
|
|
||||||
Register offset bits 31-24 bits 23-16 bits 15-8 bits 7-0
|
// Note: this could be used to make the api for receiving PCI class codes a bit
|
||||||
00 00 Device ID <---- Vendor ID <-------
|
// nicer.
|
||||||
01 04 Status <---- Command <-------
|
struct ClassCodes {
|
||||||
02 08 Class code Sub class Prog IF Revision ID
|
uint8_t ClassCode;
|
||||||
03 0C BIST Header Type Ltncy Timer Cache line Size
|
uint8_t DeviceClass;
|
||||||
04 10 Base address #0 (BAR0)
|
}__attribute__((packed));
|
||||||
05 14 Base address #1 (BAR1)
|
|
||||||
06 18 Base address #2 (BAR2)
|
|
||||||
07 1C Base address #3 (BAR3)
|
|
||||||
08 20 Base address #4 (BAR4)
|
|
||||||
09 24 Base address #5 (BAR5)
|
|
||||||
0A 28 Cardbus CIS Pointer
|
|
||||||
0B 2C Subsystem ID <------ Subsystem Vendor ID <-------
|
|
||||||
0C 30 Expansion ROM base address
|
|
||||||
0D 34 Reserved <------- Capabilities Pointer <------
|
|
||||||
0E 38 Reserved <------- <-------- <--------
|
|
||||||
0F 3C Max ltncy Min Grant Interrupt PIN Interrupt Line
|
|
||||||
|
|
||||||
*/
|
uint32_t ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offset);
|
||||||
|
uint32_t ConfigReadWord ( PCIBusAddress& PCIDeviceAddress , uint8_t offset);
|
||||||
|
|
||||||
|
inline uint64_t GetDevice (int bus, int device, int function ){
|
||||||
|
return ConfigReadWord(bus, device, function,0x0);
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
uint8_t GetHeaderType( PCIBusAddress& PCIDeviceAddress );
|
||||||
The idea for now is to support the minimal things necessary to find ATA supported drives
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
uint16_t GetClassCodes( PCIBusAddress& PICDeviceAddress );
|
||||||
|
const char* getVendor( uint64_t VendorID);
|
||||||
|
const char* GetClassCodeName (uint64_t ClassCode );
|
||||||
|
|
||||||
// Lets write some boiler plate configuration code
|
uint8_t GetProgIF (PCIBusAddress& PCIDeviceAddress);
|
||||||
|
void PCI_Enumerate();
|
||||||
|
|
||||||
uint16_t ConfigReadWord (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
|
uint32_t ReadBAR ( PCIBusAddress& PCIDeviceAddress, int bar_number);
|
||||||
|
|
||||||
uint16_t CheckVendor (uint8_t bus, uint8_t slot);
|
|
||||||
|
|
||||||
void checkDevice (uint8_t bus, uint8_t device );
|
|
7
src/kernel/pci/pciDevice.cpp
Normal file
7
src/kernel/pci/pciDevice.cpp
Normal file
@ -0,0 +1,7 @@
|
|||||||
|
#include "pciDevice.h"
|
||||||
|
|
||||||
|
// NOTE: we would really like to return a pointer
|
||||||
|
// to the newly created PCIBusAddress struct;
|
||||||
|
PCIBusAddress const PCIDevice::PCIAddress(){
|
||||||
|
return PCIBusAddress{bus ,device, function};
|
||||||
|
}
|
54
src/kernel/pci/pciDevice.h
Normal file
54
src/kernel/pci/pciDevice.h
Normal file
@ -0,0 +1,54 @@
|
|||||||
|
#pragma once
|
||||||
|
#include <stdint.h>
|
||||||
|
/*
|
||||||
|
* PCI devices API
|
||||||
|
*/
|
||||||
|
struct PCIBusAddress{
|
||||||
|
|
||||||
|
int bus ;
|
||||||
|
int device ;
|
||||||
|
int function;
|
||||||
|
|
||||||
|
|
||||||
|
uint32_t getAddress( ){
|
||||||
|
return ((uint32_t) 1 << 31) |
|
||||||
|
((uint32_t) bus << 16) |
|
||||||
|
((uint32_t) device << 11)|
|
||||||
|
((uint32_t) function << 8) |
|
||||||
|
0x0000;
|
||||||
|
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
class PCIDevice {
|
||||||
|
public :
|
||||||
|
PCIDevice (PCIBusAddress* , int );
|
||||||
|
~PCIDevice();
|
||||||
|
PCIBusAddress const PCIAddress();
|
||||||
|
|
||||||
|
|
||||||
|
inline const char* getDeviceString(){
|
||||||
|
return "Not implemented"; //GetClassCodeName(deviceclass);
|
||||||
|
}
|
||||||
|
|
||||||
|
inline const char* getVendorString(){
|
||||||
|
return "Not implemented"; // getVendor(VendorID);
|
||||||
|
}
|
||||||
|
|
||||||
|
inline void setVendorID (uint16_t id) {
|
||||||
|
this->VendorID = id;
|
||||||
|
}
|
||||||
|
|
||||||
|
private:
|
||||||
|
int bus;
|
||||||
|
int device;
|
||||||
|
int function;
|
||||||
|
|
||||||
|
uint16_t VendorID;
|
||||||
|
uint16_t DeviceID;
|
||||||
|
uint8_t deviceclass;
|
||||||
|
uint8_t devicesubclass;
|
||||||
|
|
||||||
|
int headerType;
|
||||||
|
|
||||||
|
};
|
Reference in New Issue
Block a user