Added CPUID based checks
parent
ecab248cd6
commit
133c16cae7
4
Makefile
4
Makefile
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@ -5,7 +5,7 @@ CC = ${HOME}/opt/cross/bin/i686-elf-gcc
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CPP = ${HOME}/opt/cross/bin/i686-elf-g++
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CFLAGS = -ffreestanding -Og -ggdb -Wall -Wextra
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OFILES =$(BUILD_DIR)/boot.o $(BUILD_DIR)/kterm.o $(BUILD_DIR)/kernel.o $(BUILD_DIR)/memory.o $(BUILD_DIR)/paging.o $(BUILD_DIR)/pit.o $(BUILD_DIR)/time.o $(BUILD_DIR)/keyboard.o $(BUILD_DIR)/io.o $(BUILD_DIR)/gdtc.o $(BUILD_DIR)/idt.o $(BUILD_DIR)/pic.o $(BUILD_DIR)/sv-terminal.o $(BUILD_DIR)/string.o $(BUILD_DIR)/prekernel.o $(BUILD_DIR)/cpu.o $(BUILD_DIR)/KHeap.o $(BUILD_DIR)/pci.o $(BUILD_DIR)/pcidevice.o $(BUILD_DIR)/atapiDevice.o $(BUILD_DIR)/ataDevice.o $(BUILD_DIR)/rsdp.o $(BUILD_DIR)/acpi.o
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OFILES =$(BUILD_DIR)/boot.o $(BUILD_DIR)/kterm.o $(BUILD_DIR)/kernel.o $(BUILD_DIR)/memory.o $(BUILD_DIR)/paging.o $(BUILD_DIR)/pit.o $(BUILD_DIR)/time.o $(BUILD_DIR)/keyboard.o $(BUILD_DIR)/io.o $(BUILD_DIR)/processor.o $(BUILD_DIR)/gdtc.o $(BUILD_DIR)/idt.o $(BUILD_DIR)/pic.o $(BUILD_DIR)/sv-terminal.o $(BUILD_DIR)/string.o $(BUILD_DIR)/prekernel.o $(BUILD_DIR)/cpu.o $(BUILD_DIR)/KHeap.o $(BUILD_DIR)/pci.o $(BUILD_DIR)/pcidevice.o $(BUILD_DIR)/atapiDevice.o $(BUILD_DIR)/ataDevice.o $(BUILD_DIR)/rsdp.o $(BUILD_DIR)/acpi.o
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SRC_DIR = source
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BUILD_DIR = build
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@ -128,6 +128,8 @@ $(BUILD_DIR)/prekernel.o:
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$(BUILD_DIR)/cpu.o:
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$(CPP) -c $(SRC_DIR)/kernel/cpu.cpp -o $(BUILD_DIR)/cpu.o $(CFLAGS) -fno-exceptions -fno-rtti
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$(BUILD_DIR)/processor.o:
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$(CPP) -c $(SRC_DIR)/kernel/i386/processor.cpp -o $(BUILD_DIR)/processor.o $(CFLAGS) -fno-exceptions -fno-rtti
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# Assembly -> Object files
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@ -0,0 +1,2 @@
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# architecture specific implementations
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## This will contain I386 Architecture specific implementations
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@ -0,0 +1,73 @@
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//
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// Created by nigel on 17/02/23.
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//
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#include "processor.h"
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uint32_t processor::cap_page;
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uint32_t processor::cap_page1;
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uint32_t processor::cap_page7 ;
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void processor::initialize()
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{
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asm volatile ("movl $0x80000001, %%eax;"
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"CPUID;"
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"movl %%edx, %0"
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:: "m"(cap_page));
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asm volatile ("movl $0x01, %%eax; "
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"CPUID;"
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"movl %%edx, %0"
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:: "m"(cap_page1));
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asm volatile ("movl $0x07, %%eax;"
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"movl $0x0, %%ecx;"
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"CPUID;"
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"movl %%edx, %0"
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:: "m"(cap_page7));
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}
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bool processor::hasAMXExtension()
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{
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return (cap_page7 & AMX_TYPE::AMX_BF16) || (cap_page7 & AMX_TYPE::AMX_TILE) || (cap_page7 & AMX_TYPE::AMX_INT8);
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}
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/*
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* PSE: page-size extensions for 32-bit paging.
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* If CPUID.01H:EDX.PSE [bit 3] = 1, CR4.PSE may be set to 1, enabling support for 4-MByte pages with 32-bit paging
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*/
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bool processor::has32bitPagingSupport() {
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// is the PSE bit set
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return cap_page1 & (0x1 << 3);
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}
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/*
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* PAE: physical-address extension.
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* If CPUID.01H:EDX.PAE [bit 6] = 1, CR4.PAE may be set to 1, enabling PAE paging (this setting is also required
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* for 4-level paging and 5-level paging).
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*/
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bool processor::hasPAEExtension(){
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return cap_page1 & (0x1 << 6);
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}
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/*
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* PGE: global-page support.
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* If CPUID.01H:EDX.PGE [bit 13] = 1, CR4.PGE may be set to 1, enabling the global-page feature (see Section
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* 4.10.2.4).
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*/
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bool processor::hasPageSupport(){
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return cap_page1 & (0x1 << 13);
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}
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/*
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* Page1GB: 1-GByte pages.
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* If CPUID.80000001H:EDX.Page1GB [bit 26] = 1, 1-GByte pages may be supported with 4-level paging and 5-
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* level paging (see Section 4.5).
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*/
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bool processor::gigabytePages() {
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return cap_page & (0x1 << 26);
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}
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@ -0,0 +1,29 @@
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//
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// Created by nigel on 17/02/23.
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//
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#pragma once
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#include "../terminal/kterm.h"
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class processor {
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public:
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static void initialize();
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// Based on information from https://en.wikichip.org/wiki/x86/amx#Detection
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enum AMX_TYPE{
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AMX_BF16 = (0x1 << 22),
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AMX_TILE = (0x1 << 24),
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AMX_INT8 = (0x1 << 25)
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};
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static bool hasAMXExtension();
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static bool has32bitPagingSupport();
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static bool hasPageSupport();
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static bool gigabytePages();
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static bool hasPAEExtension();
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private:
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static uint32_t cap_page;
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static uint32_t cap_page1;
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static uint32_t cap_page7;
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};
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@ -10,19 +10,20 @@ extern "C"{
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#include "memory/gdt/gdtc.h"
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#include "memory/TaskStateSegment.h"
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#include "supervisorterminal/superVisorTerminal.h"
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#include "drivers/vga/VBE.h"
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#include "drivers/pci/pci.h"
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#include "drivers/pit/pit.h"
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#include "drivers/acpi/acpi.h"
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#include "drivers/ide/ide.h"
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#include "i386/processor.h"
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#include "terminal/kterm.h"
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#include "interrupts/idt.h"
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#include "serial.h"
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extern "C" void LoadGlobalDescriptorTable();
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extern "C" void jump_usermode();
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void set_protected_bit()
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{
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// Set the protected bit of control register 0
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@ -57,10 +58,13 @@ extern "C" void kernel ()
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pit_initialise();
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ACPI::initialize();
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// ACPI::initialize();
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PCI::Scan();
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TestIDEController();
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//TestIDEController();
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processor::initialize();
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printf("Enable Protected mode and jump to kernel main\n");
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@ -91,7 +91,8 @@ extern "C" void startSuperVisorTerminal()
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};
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// FIXME: If no drive is connected we continue trying to read from
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// a not connected drive!
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ATA_DEVICE::Identify((uint16_t) BUS_PORT::Primary, DEVICE_DRIVE::MASTER);
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const int C = 0;
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