Nigel
5781f730d9
A software interrupt with vector 0x50 will cause a syscall to start executing. The EAX register will hold the syscall_num. Other registers and the stack can be used to hold further arguments.
428 lines
13 KiB
C++
428 lines
13 KiB
C++
#include "idt.h"
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#include "../drivers/pit/pit.h"
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#include "../drivers/ps-2/keyboard.h"
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#include "../i386/processor.h"
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#include "../memory/VirtualMemoryManager.h"
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#include "../syscalls.h"
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IDT_entry idt_table[256];
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IDT_ptr idt_ptr;
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void set_id_entry (uint8_t num , uint32_t base, uint16_t sel, uint8_t flags){
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idt_table[num].offset_1 = base & 0xFFFF;
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idt_table[num].selector = sel;
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idt_table[num].zero = 0;
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idt_table[num].type_attr = flags;
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idt_table[num].offset_2 = (base >> 16) & 0xFFFF;
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};
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void irs_handler (registers* regs) {
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uint32_t FaultingAddress;
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printf("(IRS) Interrupt number: %d \n EAX: ", regs->int_no, regs->eax);
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switch (regs->int_no)
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{
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case 0:
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// Divide Error #DE
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printf("#DE\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 1:
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// Debug Exception #DB
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printf("#DB\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 2:
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// NMI Interrupt
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printf("#NMI\n");
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break;
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case 3:
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// Breakpoint Exception #BP
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printf("#BP\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 4:
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// Overflow Exception #OF
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printf("#OF\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 5:
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// BOUND Range Exceeded Exception #BR
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printf("#BR\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 6:
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// Invalid OpCode Exception #UD
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printf("#UD\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 7:
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// Device Not Available Exception #NM
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printf("#NM\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 8:
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// Double Fault Exception #DF
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printf("#DF\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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while(true);
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break;
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case 9:
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// Coprocessor Segment Overrun
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printf("Coprocessor Segment overrun!\n");
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break;
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case 10:
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// Invalid TSS Exception #TS
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printf("#TS\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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__asm__("cli;" "1: hlt;" "jmp 1b;");
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break;
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case 11:
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// Segment Not Present #NP
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printf("#NP\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 12:
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// Stack Fault Exception #SS
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printf("#SS\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 13:{
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// General Protection Exception #GP
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printf("#GP\n");
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printf("Accessing memory caused a general protection exception.\n");
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printf("Faulting instruction at addres: 0x%x\n", regs->eip );
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printf("Error code: 0x%x\n", regs->err_code);
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if (regs->err_code != 0){
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printf("Fault due to entry at index: 0x%x (%d)\n", (regs->err_code >> 3 & 0xFFF ) , regs->err_code);
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uint8_t table = regs->err_code >> 1 & 0x3 ;
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if(table == 0 ){
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printf("* Index references GDT\n");
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}
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if(table == 1 ){
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printf("* Index references IDT\n");
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}
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if(table == 2 ){
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printf("* Index references LDT\n");
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}
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if(table == 3 ){
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printf("* Index references IDT\n");
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}
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if( regs->err_code & 0x1)
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{
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printf("* Originated externally!\n");
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}
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}
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__asm__("cli;" "1: hlt;" "jmp 1b;");
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}
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break;
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case 14:
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// Page Fault Exception #PF
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printf("#PF\n");
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#define ALIGN(addr, align) (((addr) & ~((align) - 1)) + (align))
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FaultingAddress = processor::GetCR2();
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printf("Accessing the linear address 0x%x resulted in a page fault!\n\n", FaultingAddress);
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// Error code of 32 bits are on the stack
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// CR2 register contains the 32-bit linear virtual address that generated the exception
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// See Intel Software Developers manual Volume 3A Part 1 page 236 for more info
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#define PF_ERR_PRESENT_BIT 0x1
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#define PF_ERR_WRITE_BIT 0x2
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#define PF_ERR_USER_BIT 0x3
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#define PF_ERR_RESERVERD_WRITE_BIT 0x4
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#define PF_ERR_INSTRUCTION_FETCH_BIT 0x5
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#define PF_ERR_PROTECTION_KEY_BIT 0x6
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#define PF_ERR_SHADOW_STACK_BIT 0x7
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#define PF_ERR_SOFTWARE_GUARD_EXTENSION_BIT 0xE
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printf("REASON: \n\n");
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if (regs->err_code & PF_ERR_PRESENT_BIT ){
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printf("* Page protection violation!\n");
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} else{
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printf("* Page not-present!\n");
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Immediate_Map(FaultingAddress, FaultingAddress - 0xC0000000);
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}
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if(regs->err_code & PF_ERR_WRITE_BIT){
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printf("* Write access violation!\n");
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} else{
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printf("* Read access violation!\n");
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}
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if(regs->err_code & PF_ERR_USER_BIT){
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printf("* Violation from user-space (CPL=3)\n");
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}
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if(regs->err_code & PF_ERR_INSTRUCTION_FETCH_BIT){
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printf("* Caused by an instruction fetch. \n");
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}
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__asm__("cli;" "1: hlt;" "jmp 1b;");
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break;
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case 16:
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// x87 FPU Floating-point Error #MF
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printf("#MF\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 17:
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// Alignment Check Exception #AC
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printf("#AC\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 18:
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// Machine-Check Exception #MC
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printf("#MC\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 19:
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// SIMD Floating-point Exception #XM
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printf("#XM\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 20:
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// Virtualization Exception #VE
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printf("#VE\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 21:
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// Control Protection Exception #CP
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printf("#CP\n");
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printf("EIP: 0x%x\n", regs->eip);
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printf("EAX: 0x%x\n", regs->eax);
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printf("EBP: 0x%x\n", regs->ebp);
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break;
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case 50:
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printf("SYSTEMCALL\n");
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printf("EAX 0x%x\n", regs->eax);
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switch (regs->eax) {
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case 0x0:
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printf("test!\n");
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break;
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case 0x5:
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sys_open();
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break;
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case 0x10:
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sys_read((FILE*)regs->ebx, (char*)regs->ecx);
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break;
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case 0x20:
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sys_write((FILE*)regs->ebx, (const char*)regs->ecx, regs->edx);
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break;
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case 0x666:
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sys_version();
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break;
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};
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break;
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default:
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// PANIC!!!
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break;
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}
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}
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void irq_handler (registers regs) {
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switch (regs.int_no) {
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case 0:
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pit_tick++;
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break;
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case 1:
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// Keyboard interrupt !!
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int scan;
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int i;/*register*/
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// Read scancode
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scan = inb(0x60);
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// Send ack message!
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i = inb(0x61);
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outb(0x61, i|0x80);
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outb(0x61, i);
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// NOTE: check for special scan codes
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// e.g. modifiers etc..
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if( scan < 0x37){
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//printf("Read from IO: 0x%x\n", scan);
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keyPress.ScanCode = scan ;
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//printf( "[From Interrupt] Scancode: %x\n", keyPress.ScanCode);
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}
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break;
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case 12:
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// PS2 Mouse interrupt
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printf("Mouse event triggered!");
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//int event = inb(0x60);
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break;
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default:
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//printf("Interrupt happened!");
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//printf("Received INT: 0x%x\n", regs.int_no);
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break;
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}
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outb(0x20, 0x20); // send end of interrupt to master
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if ( regs.int_no > 8 && regs.int_no <= 15) {
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outb(0xA0, 0x20); // send end of interrupt to slave
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}
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if( regs.int_no == 13){
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printf(" Error code: %d \n", regs.err_code);
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}
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}
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void initidt(){
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// Initialize the IDT pointer
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idt_ptr.length = sizeof(IDT_entry) * 255;
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idt_ptr.base = (uint32_t)&idt_table;
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#ifdef __VERBOSE__
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printf("Init IDT\n");
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#endif
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// TODO: Set everything to zero first
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set_id_entry(0, (uint32_t) irs0 , 0x08, 0x8F);
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set_id_entry(1, (uint32_t) irs1 , 0x08, 0x8E);
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set_id_entry(2, (uint32_t) irs2 , 0x08, 0x8E);
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set_id_entry(3, (uint32_t) irs3 , 0x08, 0x8E);
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set_id_entry(4, (uint32_t) irs4 , 0x08, 0x8E);
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set_id_entry(5, (uint32_t) irs5 , 0x08, 0x8E);
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set_id_entry(6, (uint32_t) irs6 , 0x08, 0x8E);
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set_id_entry(7, (uint32_t) irs7 , 0x08, 0x8E);
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set_id_entry(8, (uint32_t) irs8 , 0x08, 0x8E);
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set_id_entry(9, (uint32_t) irs9 , 0x08, 0x8E);
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set_id_entry(10, (uint32_t) irs10 , 0x08, 0x8E);
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set_id_entry(11, (uint32_t) irs11 , 0x08, 0x8E);
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set_id_entry(12, (uint32_t) irs12 , 0x08, 0x8E);
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set_id_entry(13, (uint32_t) irs13 , 0x08, 0x8E);
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set_id_entry(14, (uint32_t) irs14 , 0x08, 0x8E);
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set_id_entry(15, (uint32_t) irs15 , 0x08, 0x8E);
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set_id_entry(16, (uint32_t) irs16 , 0x08, 0x8E);
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set_id_entry(17, (uint32_t) irs17 , 0x08, 0x8E);
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set_id_entry(18, (uint32_t) irs18 , 0x08, 0x8E);
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set_id_entry(19, (uint32_t) irs19 , 0x08, 0x8E);
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set_id_entry(20, (uint32_t) irs20 , 0x08, 0x8E);
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set_id_entry(21, (uint32_t) irs21 , 0x08, 0x8E);
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set_id_entry(22, (uint32_t) irs22 , 0x08, 0x8E);
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set_id_entry(23, (uint32_t) irs23 , 0x08, 0x8E);
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set_id_entry(24, (uint32_t) irs24 , 0x08, 0x8E);
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set_id_entry(25, (uint32_t) irs25 , 0x08, 0x8E);
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set_id_entry(26, (uint32_t) irs26 , 0x08, 0x8E);
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set_id_entry(27, (uint32_t) irs27 , 0x08, 0x8E);
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set_id_entry(28, (uint32_t) irs28 , 0x08, 0x8E);
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set_id_entry(29, (uint32_t) irs29 , 0x08, 0x8E);
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set_id_entry(30, (uint32_t) irs30 , 0x08, 0x8E);
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set_id_entry(31, (uint32_t) irs31 , 0x08, 0x8E);
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set_id_entry(0x50, (uint32_t) irs50, 0x08, 0x8E);
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//print_serial("Remapping PIC\n");
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PIC_remap(0x20, 0x28);
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// clear mask for IRQ 12
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uint8_t value = inb(0x21) & ~(1<< 12);
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outb(0x21, value);
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// pic IRQ Table
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set_id_entry(32, (uint32_t)irq0, 0x08, 0x8E);
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set_id_entry(33, (uint32_t)irq1, 0x08, 0x8E); // PS2 Keyboard
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set_id_entry(34, (uint32_t)irq2, 0x08, 0x8E);
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set_id_entry(35, (uint32_t)irq3, 0x08, 0x8E);
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set_id_entry(36, (uint32_t)irq4, 0x08, 0x8E);
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set_id_entry(37, (uint32_t)irq5, 0x08, 0x8E);
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set_id_entry(38, (uint32_t)irq6, 0x08, 0x8E);
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set_id_entry(39, (uint32_t)irq7, 0x08, 0x8E);
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set_id_entry(40, (uint32_t)irq8, 0x08, 0x8E);
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set_id_entry(41, (uint32_t)irq9, 0x08, 0x8E);
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set_id_entry(42, (uint32_t)irq10, 0x08, 0x8E);
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set_id_entry(43, (uint32_t)irq11, 0x08, 0x8E);
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set_id_entry(44, (uint32_t)irq12, 0x08, 0x8E); // PS2 Mouse
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set_id_entry(45, (uint32_t)irq13, 0x08, 0x8E);
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set_id_entry(46, (uint32_t)irq14, 0x08, 0x8E);
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set_id_entry(47, (uint32_t)irq15, 0x08, 0x8E);
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idt_flush((uint32_t)&idt_ptr);
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}
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