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Author SHA1 Message Date
9436e6e033 End of the day cleanup.
* Added symbol files to .gitignore
* Improved text in #PG and #GP handlers
* Added the printing of the multiboot structure address and the magic value
* Added page fault screenshot to readme
2022-08-19 01:05:10 +02:00
d280aa0584 Page faults and protetion faults will now hang with a helpful message
to explain what is going on.

I removed previously set barriers from the code to load
the kernel further.
2022-08-19 00:44:52 +02:00
10 changed files with 156 additions and 31 deletions

2
.gitignore vendored
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@ -5,4 +5,6 @@ isodir/
root/
*.iso
*.img
*.sym

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@ -37,6 +37,7 @@ run: all
$(EMULATOR) -cdrom build/barinkOS.iso -serial stdio -vga std -display gtk -m 2G -cpu core2duo
debug: all
objcopy --only-keep-debug build/myos.bin kernel.sym
$(EMULATOR) -cdrom build/barinkOS.iso -serial stdio -vga std -display gtk -m 2G -cpu core2duo -s -d int
build_kernel: $(OBJ_LINK_LIST)

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@ -16,6 +16,11 @@ W.I.P - Working on interrupt handling
![Multiboot integration](screenshots/multiboot.png) \
Multiboot information can be read by the kernel.
![Page faulting](screenshots/PageFault.png) \
Enabled paging and am getting page faults!
________________________
### The goal

BIN
screenshots/PageFault.png (Stored with Git LFS) Normal file

Binary file not shown.

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@ -1,10 +1,11 @@
#include "idt.h"
#include "../../Drivers/PIT/pit.h"
#include "../../Drivers/PS-2/keyboard.h"
#include "../../cpu.h"
IDT_entry idt_table[256];
IDT_ptr idt_ptr;
void set_id_entry (uint8_t num , uint32_t base, uint16_t sel, uint8_t flags){
idt_table[num].offset_1 = base & 0xFFFF;
idt_table[num].selector = sel;
@ -15,7 +16,7 @@ void set_id_entry (uint8_t num , uint32_t base, uint16_t sel, uint8_t flags){
};
void irs_handler (registers regs) {
uint32_t FaultingAddress;
//printf("(IRS) Interrupt number: %d \r", regs.int_no);
switch (regs.int_no)
{
@ -120,28 +121,81 @@ void irs_handler (registers regs) {
case 13:
// General Protection Exception #GP
printf("#GP\n");
printf("EIP: 0x%x\n", regs.eip);
printf("EAX: 0x%x\n", regs.eax);
printf("EBP: 0x%x\n", regs.ebp);
printf("Accessing memory caused a general protectuion exception.\n");
printf("Fault due to entry at index: %d", (regs.err_code >> 3 & 0xFFF ) );
if(regs.err_code & 0x3 >> 1 == 0 ){
printf("* Index references GDT");
}
if(regs.err_code & 0x3 >> 1 == 1 ){
printf("* Index references IDT");
}
if(regs.err_code & 0x3 >> 1 == 2 ){
printf("* Index references LDT");
}
if(regs.err_code & 0x3 >> 1 == 4 ){
printf("* Index references IDT");
}
if( regs.err_code & 0x1)
{
printf("* Originated externally!");
}
__asm__("cli;" "1: hlt;" "jmp 1b;");
break;
case 14:
// Page Fault Exception #PF
printf("#PF\n");
printf("EIP: 0x%x\n", regs.eip); // Points to faulting instruction ???
printf("EAX: 0x%x\n", regs.eax);
printf("EBP: 0x%x\n", regs.ebp); // Base pointer pointing to the bottom of the stack
FaultingAddress = GetCR2();
printf("Accessing the linear address 0x%x resulted in a page fault!\n\n", FaultingAddress);
// Error code of 32 bits are on the stack
// CR2 register contains the 32-bit linear address that generated the exception
// CR2 register contains the 32-bit linear virtual address that generated the exception
// See Intel Software Developers manual Volume 3A Part 1 page 236 for more info
#define PF_ERR_PRESENT_BIT 0x1
#define PF_ERR_WRITE_BIT 0x2
#define PF_ERR_USER_BIT 0x3
#define PF_ERR_RESERVERD_WRITE_BIT 0x4
#define PF_ERR_INSTRUCTION_FETCH_BIT 0x5
#define PF_ERR_PROTECTION_KEY_BIT 0x6
#define PF_ERR_SHADOW_STACK_BIT 0x7
#define PF_ERR_SOFTWARE_GUARD_EXTENSION_BIT 0xE
printf("REASON: \n\n");
if (regs.err_code & PF_ERR_PRESENT_BIT ){
printf("* Page protection violation!\n");
} else{
printf("* Page not-present!\n");
}
if(regs.err_code & PF_ERR_WRITE_BIT){
printf("* Write access violation!\n");
} else{
printf("* Read access violation!\n");
}
if(regs.err_code & PF_ERR_USER_BIT){
printf("* Violation from user-space (CPL=3)\n");
}
if(regs.err_code & PF_ERR_INSTRUCTION_FETCH_BIT){
printf("* Caused by an instruction fetch. \n");
}
/*
Check the error code to figure out what happened here
*/
__asm__("cli;" "1: hlt;" "jmp 1b;");

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@ -10,7 +10,7 @@ void PhysicalMemory::setup( MemoryInfo* memory) {
used_blocks = 0;
memoryBitMap = (uint32_t*) 0x00a00000;
memoryBitMap = (uint32_t*) 0xCCA00000;
printf("Maximum Number of blocks: 0x%x, Number of bytes for memMap: 0x%x\n", max_blocks , (max_blocks/8));

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@ -60,3 +60,15 @@ extern "C" uint32_t GetCR4();
#define GET_PSE_BIT(CONTROL_REGISTER_4) (CONTROL_REGISTER_4&0x4)
#define GET_PAE_BIT(CONTROL_REGISTER_4) (CONTROL_REGISTER_4&0x5)
/*
* CONTROL_REGISTER_2 FUNCTIONS
*/
extern "C" uint32_t GetCR2();
/*
* CONTROL_REGISTER_3 FUNCTIONS
*/
extern "C" uint32_t GetCR3();

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@ -36,4 +36,28 @@ GetEFLAGS:
mov %ebp, %esp
pop %ebp
ret
ret
.globl GetCR2
GetCR2:
push %ebp
mov %esp, %ebp
xor %eax, %eax
mov %cr2, %eax
mov %ebp, %esp
pop %ebp
ret
.globl GetCR3
GetCR3:
push %ebp
mov %esp, %ebp
xor %eax, %eax
mov %cr3, %eax
mov %ebp, %esp
pop %ebp
ret

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@ -2,8 +2,7 @@
extern "C" void kernel_main (BootInfo* bootinfo) {
init_serial();
//pit_initialise();
pit_initialise();
startSuperVisorTerminal(bootinfo);
}
@ -17,9 +16,40 @@ extern "C" void early_main(unsigned long magic, unsigned long addr){
initGDT();
kterm_init();
init_serial();
print_serial("Hello Higher half kernel!");
printf("DDDDDDDDDDDDDDDD");
return;
print_serial("Hello Higher half kernel!\n");
init_idt();
// Enable interrupts
asm volatile("STI");
// map the multiboot structure into virtual memory
// so we can gather the necessary data from it.
/* const uint32_t KERNEL_BASE_ADDR = 0xC0000000;
uint32_t pageDirectoryIndex = (addr + KERNEL_BASE_ADDR) >> 22;
printf("pageDirectoryIndex: %d\n", pageDirectoryIndex);
uint32_t pageTableIndex = (addr + KERNEL_BASE_ADDR >> 12) & 0x1FFF;
printf("PagTableIndex: %d\n", pageTableIndex);
printf("boot_page_directory addr: 0x%x\n", &boot_page_directory);
printf("boot_page_table addr: 0x%x\n", &boot_page_table);
uint32_t* pageDirectoryEntry = (uint32_t*) ((uint32_t) &boot_page_directory) + (pageDirectoryIndex * 4);
printf("page_directory_entry addr: 0x%x\n", pageDirectoryEntry);
*pageDirectoryEntry = ( addr & 0xFFFFF000 ) | 0x003;
uint32_t* page_table_entry = (uint32_t*) ((uint32_t) &boot_page_table) + ( pageTableIndex * 4);
printf("page_table_entry addr: 0x%x\n" , page_table_entry);
*page_table_entry = addr | 0x003;
// Reload CR3 to force a flush
asm("movl %cr3, %ecx;" "movl %ecx, %cr3" );
*/
printf("DEBUG:\n Magic: 0x%x\n MBT_addr: 0x%x\n", magic, addr);
/**
* Check Multiboot magic number
* NOTE: Printf call should not be a thing this early on ...
@ -33,13 +63,12 @@ extern "C" void early_main(unsigned long magic, unsigned long addr){
* Show a little banner for cuteness
*/
printf("|=== BarinkOS ===|\n");
printf("Kernel Begin AT(0x%x)", kernel_begin);
const uint32_t KERNEL_BASE_ADDR = 0xC0000000;
/**
* Use the address given as an argument as the pointer
* to a Multiboot information structure.
*/
multiboot_info_t* mbt = (multiboot_info_t*) addr;
multiboot_info_t* mbt = (multiboot_info_t*) (addr + KERNEL_BASE_ADDR);
/**
* Construct our own bootInfo structure
@ -111,16 +140,11 @@ extern "C" void early_main(unsigned long magic, unsigned long addr){
//InitializePaging();
//IdentityMap();
//Enable();
} else{
printf("memory flag not set!");
}
//initGDT();
//init_idt();
// Enable interrupts
//asm volatile("STI");
//CheckMBT( (multiboot_info_t *) addr);
CheckMBT( (multiboot_info_t *) addr);
kernel_main(&bootinfo);

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@ -28,7 +28,7 @@ extern "C"
#include "time.h"
#include "SuperVisorTerminal/superVisorTerminal.h"
#define CHECK_FLAG(flags, bit) ((flags) & (1 <<(bit)))
#define CHECK_FLAG(flag, bit) ( flag & (1 << bit ))
#define PANIC(message) {return;}