Started fleshing out the storage API

This commit is contained in:
2023-02-21 14:36:20 +01:00
parent 81f7351fe6
commit ef2bba5c1c
49 changed files with 661 additions and 475 deletions

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#include "ataDevice.h"
#include "../../io/io.h"
#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
void ATAPIO::Read(uint16_t DEVICE_CHANNEL, DEVICE_DRIVE drive, uint32_t LBA, uint16_t* buffer) {
/*
Assume you have a sectorcount byte and a 28 bit LBA value. A sectorcount of 0 means 256 sectors = 128K.
Notes: - When you send a command byte and the RDY bit of the Status Registers is clear, you may have to wait (technically up to 30 seconds) for the drive to spin up, before DRQ sets. You may also need to ignore ERR and DF the first four times that you read the Status, if you are polling.
- for polling PIO drivers: After transferring the last uint16_t of a PIO data block to the data IO port, give the drive a 400ns delay to reset its DRQ bit (and possibly set BSY again, while emptying/filling its buffer to/from the drive).
- on the "magic bits" sent to port 0x1f6: Bit 6 (value = 0x40) is the LBA bit. This must be set for either LBA28 or LBA48 transfers. It must be clear for CHS transfers. Bits 7 and 5 are obsolete for current ATA drives, but must be set for backwards compatibility with very old (ATA1) drives.
An example of a 28 bit LBA PIO mode read on the Primary bus:
*/
const int sectorCount = 1;
// Floating bus check
uint8_t floatingBus = inb(DEVICE_CHANNEL | 7);
if (floatingBus == 0xFF){
printf("Floating bus!!");
return ;
}
//printf("Read LBA: 0x%x\n", LBA);
// Send 0xE0 for the "master" or 0xF0 for the "slave", ORed with the highest 4 bits of the LBA to port 0x1F6: outb(0x1F6, 0xE0 | (slavebit << 4) | ((LBA >> 24) & 0x0F))
outb(DEVICE_CHANNEL | 6 , ( 0xE0 | (LBA >>28) ) );
// Send a NULL byte to port 0x1F1, if you like (it is ignored and wastes lots of CPU time): outb(0x1F1, 0x00)
outb(DEVICE_CHANNEL | 1, 0x0000 );
//Send the sectorcount to port 0x1F2: outb(0x1F2, (unsigned char) count)
outb(DEVICE_CHANNEL | 2, sectorCount);
//Send the low 8 bits of the LBA to port 0x1F3: outb(0x1F3, (unsigned char) LBA))
outb(DEVICE_CHANNEL | 3, LBA);
//Send the next 8 bits of the LBA to port 0x1F4: outb(0x1F4, (unsigned char)(LBA >> 8))
outb(DEVICE_CHANNEL | 4, (LBA >> 8));
//Send the next 8 bits of the LBA to port 0x1F5: outb(0x1F5, (unsigned char)(LBA >> 16))
outb(DEVICE_CHANNEL | 5, (LBA >> 16));
//Send the "READ SECTORS" command (0x20) to port 0x1F7: outb(0x1F7, 0x20)
outb(DEVICE_CHANNEL | 7, 0x20);
volatile int i,j;
for(i=0;i<2000;i++)
for(j=0;j<25000;j++)
asm("NOP");
//Wait for an IRQ or poll.
uint8_t status = inb(DEVICE_CHANNEL | 7);
if( status == 0x00){
printf("No drive\n");
return;
}
//printf("Status: %x\n", status);
// Check if busy!
while((status & 0x80) == 0x80){
printf("Reading....\r");
status = inb(DEVICE_CHANNEL | 7);
}
if ((status & 0x01) == 0x01){
printf("Error occured during read!\n");
return;
}
//Transfer 256 16-bit values, a uint16_t at a time, into your buffer from I/O port 0x1F0.
if( status & 0x01){
printf("Error!\n");
printf("Status: 0x%x\n", status);
uint16_t error_register = inb(DEVICE_CHANNEL | 1);
printf("Error register 0x%x\n",error_register );
return ;
}
for ( int i = 0; i < 256; i++){
uint16_t data;
asm volatile ("inw %1, %0" : "=a"(data): "Nd"(DEVICE_CHANNEL));
// printf (" %x ", data);
buffer[i] = data;
}
//Then loop back to waiting for the next IRQ (or poll again -- see next note) for each successive sector.
}
void ATAPIO::Write(uint16_t data, DEVICE_DRIVE dev){
printf("Not implemented\n");
}
void ATAPIO::Identify(uint16_t DEVICE_CHANNEL,DEVICE_DRIVE drive ){
// lets ignore which port we actually want to check for now !
/*
THE STEPS INVOLVED
1. Select the target drive by sending master (0x0A) or slave (0x0B) to the
drive select IO port
2. Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
3. Send the identify command (0xEC) to the command IO port
4. Read the status port
4.2 If the value is 0x0 the drive does not exist
4.3 If it has any other value continue
5. poll the status port until bit 7 is clear.
6. Check if the LBAmid and LBAhi ports are non-zero
6.2. If non-zero stop polling this is not an ATA device
6.3 If zero continue
7. poll status port until bit 3 is set or bit 0 is set
8. if err is clear, read the data from the data port
*/
//printf("channel selected: 0x%x", DEVICE_CHANNEL);
// Assuming Master here
// Select the target drive
outb(DEVICE_CHANNEL | 6, drive); // on the primary bus select the master drive
outb(DEVICE_CHANNEL | 6 , 0x0); // write 0 to the controlport for some reason
outb(DEVICE_CHANNEL | 6, drive);
uint8_t status = inb(DEVICE_CHANNEL | 7 );
if(status == 0x00){
printf("No drive\n");
return;
}
// send the identify command;
outb(DEVICE_CHANNEL | 7, 0xEC);
// set the sectorCount, LBAlo, LBAmid, LBA,hi IO ports to 0
outb(DEVICE_CHANNEL | 2, 0);
outb(DEVICE_CHANNEL | 3, 0);
outb(DEVICE_CHANNEL | 4, 0);
outb(DEVICE_CHANNEL | 5, 0);
// send the identify command ;
//printf("command sent!\n");
outb(DEVICE_CHANNEL | 7 , 0xEC);
// read the status port
uint8_t status2 = inb(DEVICE_CHANNEL | 7);
if( status2 == 0x00){
printf("No drive\n");
return;
}
//printf("Waiting until ready...\n");
while(((status2 & 0x80 == 0x80)
&& (status2 & 0x01) != 0x01)
) status2 = inb(DEVICE_CHANNEL | 7);
if( status2 & 0x01){
printf("Error!\n");
return ;
}
uint16_t deviceIdentify [256] = {0};
for ( int i = 0; i < 256; i++){
uint16_t data;
asm volatile ("inw %1, %0" : "=a"(data): "Nd"(DEVICE_CHANNEL));
deviceIdentify[i] = data;
}
printf("Model-label (ASCII hex): ");
for(int i = 27; i < 47; i++){
kterm_put((char)(deviceIdentify[i] >> 8));
kterm_put((char)(deviceIdentify[i] & 0x00FF));
}
kterm_put('\n');
}
void ATAPIO::Soft_Reset(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive){
printf("Soft reseting drive...\n");
// outb(channels[DEVICE_CHANNEL].base + 7 , 0x4);
// wait a bit..
for(int i = 0 ; i < 1000000; i++){
asm volatile("NOP");
}
//outb(channels[DEVICE_CHANNEL].base + 7 , 0x0);
}

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#pragma once
#include <stdint-gcc.h>
#include "../ide/ideCommands.h"
#include "../ide/sampleIDE.definitions.h"
#include "../../devices/BlockDevice.h"
#include "../../terminal/kterm.h"
/*
* This first driver wil make use of IO ports.
* Doing so means reading or writing from disk is going
* to be very cpu intensive.
*/
enum DEVICE_DRIVE{
MASTER = 0xA0,
SLAVE = 0xB0
};
enum BUS_PORT {
Primary = 0x1f0,
Secondary = 0x170
};
class ATAPIO
{
public:
static void Identify(uint16_t, DEVICE_DRIVE);
static void Read (uint16_t, DEVICE_DRIVE, uint32_t, uint16_t*);
static void Write(uint16_t, DEVICE_DRIVE);
static void Soft_Reset(uint8_t ,DEVICE_DRIVE );
};

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#include "atapiDevice.h"
#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
bool isPacketDevice(){
uint8_t LBAmid = inb(0x174);
uint8_t LBAhi = inb(0x175);
printf(" LBAmid: 0x%x, LBAhi: 0x%x");
return LBAmid == 0x14 && LBAhi == 0xEB;
}
void ATAPI_DEVICE::Identify(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive ){
// lets ignore which port we actually want to check for now !
/* THE STEPS INVOLVED
1. Select the target drive by sending master (0x0A) or slave (0x0B) to the
drive select IO port
2. Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
3. Send the identify command (0xEC) to the command IO port
4. Read the status port
4.2 If the value is 0x0 the drive does not exist
4.3 If it has any other value continue
5. poll the status port until bit 7 is clear.
6. Check if the LBAmid and LBAhi ports are non-zero
6.2. If non-zero stop polling this is not an ATA device
6.3 If zero continue
7. poll status port until bit 3 is set or bit 0 is set
8. if err is clear, read the data from the data port
*/
// Select the target drive
outb(0x176, 0xA0); // on the secondary bus select the master drive
outb(0x170 + 0x206 , 0x0); // write 0 to the controlport for some reason
outb(0x176, 0xA0);
// read the status port
uint8_t status = inb(0x177);
printf("status after drive select: 0x%x\n",status);
if( status == 0x00){
printf("No drive\n");
return;
}
outb(0x176, 0xA0);
// Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
outb(0x172, 0);
outb(0x173, 0);
outb(0x174, 0);
outb(0x175, 0);
// send the identify command;
printf("command sent!\n");
outb(0x177, 0xA1);
// read the status port
uint8_t status2 = inb(0x177);
if( status2 == 0x00){
printf("No drive\n");
return;
}
printf("Waiting until ready...\n");
while(((status2 & 0x80 == 0x80)
&& (status2 & 0x01) != 0x01)
) status2 = inb(0x177);
if(status2 & 0x01){
printf("Error!");
return;
}
// READ DATA
uint16_t deviceIdentify [256] ={0};
for (int i= 0; i < 256; i++){
uint16_t data;
asm volatile ( "in %1, %0"
: "=a"(data)
: "Nd"(0x170) );
deviceIdentify[i] = data ;
}
printf("Model-label (ASCII hex):\n");
for(int i = 27; i < 47; i++){
printf(" %x ",deviceIdentify[i]);
}
printf("\nSerial number (ASCII hex):\n");
for (int i = 10; i < 19; i++){
printf(" %x ", deviceIdentify[i]);
}
printf("\nFirmware revision (ASCII hex):\n");
for (int i = 23; i < 26; i++){
printf(" %x ", deviceIdentify[i]);
}
printf("\nConfiguration: %x\n", deviceIdentify[0]);
printf("\nData received!\n");
}
void ATAPI_DEVICE::Read(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
printf("Not implemented");
}
void ATAPI_DEVICE::Write(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
printf("Not implemented");
}

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#pragma once
#include <stdint.h>
#include "../../io/io.h"
#include "../ide/ideCommands.h"
#include "../ide/sampleIDE.definitions.h"
#include "../../terminal/kterm.h"
/*
* This first driver wil make use of IO ports.
* Doing so means reading or writing from disk is going
* to be very cpu intensive.
*
*/
enum DEVICE_DRIVE{
MASTER = 0xA0,
SLAVE = 0xB0
};
namespace ATAPI_DEVICE
{
bool isPacketDevice();
void Identify ( uint8_t, DEVICE_DRIVE );
void Read ( uint8_t, DEVICE_DRIVE );
void Write ( uint8_t, DEVICE_DRIVE );
};

98
kernel/storage/ide/ide.h Normal file
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#pragma once
#include <stdint-gcc.h>
#include "../../terminal/kterm.h"
#include "ideCommands.h"
#include "sampleIDE.h"
#include "../../pci/pciDevice.h"
#include "../../pci/pci.h"
#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
IDEChannelRegisters channels[2];
IDE_DEVICE ide_devices[4];
inline void CheckProgIF(uint8_t ProgIF){
if( IS_BIT_SET(ProgIF, 0) ) // Is the 0th bit set
{
printf ("Primary Channel is in PCI native mode\n");
} else{
printf("Primary Channel is in Compatibility mode\n");
}
if( IS_BIT_SET(ProgIF, 1)){
printf("Bit 0 can be modified\n");
}else{
printf("Bit 0 cannot be modified\n");
}
if( IS_BIT_SET(ProgIF, 2)){
printf("Secondary channel is in PCI native mode\n");
}else{
printf("Secondary channel is in Compatibility mode\n");
}
if( IS_BIT_SET(ProgIF, 3)){
printf("Bit 2 can be modified\n");
}else{
printf("Bit 2 cannot be modified\n");
}
if( IS_BIT_SET(ProgIF , 7)){
printf("This is a bus master IDE Controller\n");
} else{
printf("This controller doesn't support DMA!\n");
}
}
inline void TestIDEController(){
// Do stuff
printf("Testing IDE controllers\n");
// NOTE: Testing done with a hard coded known PCI addres
// Of an intel PIIX3 IDE Controller
int bus = 0;
int device =1 , function = 1;
PCIBusAddress IDEControllerPCIAddress = PCIBusAddress{bus,device, function};
uint8_t ProgIF = PCI::GetProgIF(IDEControllerPCIAddress);
printf( "ProgIF: 0x%x\n" ,ProgIF);
//CheckProgIF(ProgIF);
// For this test will just assume all bits are set
// the CheckProgIF can check but on the test machine all bits are set anyways
uint32_t BAR0,BAR1,BAR2,BAR3, BAR4;
BAR0 = PCI::ReadBAR(IDEControllerPCIAddress, 0);
BAR1 = PCI::ReadBAR(IDEControllerPCIAddress, 1);
BAR2 = PCI::ReadBAR(IDEControllerPCIAddress, 2);
BAR3 = PCI::ReadBAR(IDEControllerPCIAddress, 3);
BAR4 = PCI::ReadBAR(IDEControllerPCIAddress, 4);
// All bars are return 0xffffff for some as of yet mysterious reason!
printf( "BAR 0: 0x%x\n", BAR0);
printf( "BAR 1: 0x%x\n", BAR1);
printf( "BAR 2: 0x%x\n", BAR2);
printf( "BAR 3: 0x%x\n", BAR3);
printf( "BAR 4: 0x%x\n", BAR4);
init_IDE(BAR0, BAR1, BAR2, BAR3, BAR4);
// Read Something from disc
unsigned int maxByteCount = 20 ;
void* MDA_buffer = (void*)0xC0000000;
}

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#pragma once
// Commands
#define ATA_CMD_READ_PIO 0x20
#define ATA_CMD_READ_PIO_EXT 0x24
#define ATA_CMD_READ_DMA 0xC8
#define ATA_CMD_READ_DMA_EXT 0x25
#define ATA_CMD_WRITE_PIO 0x30
#define ATA_CMD_WRITE_PIO_EXT 0x34
#define ATA_CMD_WRITE_DMA 0xCA
#define ATA_CMD_WRITE_DMA_EXT 0x35
#define ATA_CMD_CACHE_FLUSH 0xE7
#define ATA_CMD_CACHE_FLUSH_EXT 0xEA
#define ATA_CMD_PACKET 0xA0
#define ATA_CMD_IDENTIFY_PACKET 0xA1
#define ATA_CMD_IDENTIFY 0xEC
#define ATAPI_CMD_READ 0xA8
#define ATAPI_CMD_EJECT 0x1B
#define ATA_IDENT_DEVICETYPE 0
#define ATA_IDENT_CYLINDERS 2
#define ATA_IDENT_HEADS 6
#define ATA_IDENT_SECTORS 12
#define ATA_IDENT_SERIAL 20
#define ATA_IDENT_MODEL 54
#define ATA_IDENT_CAPABILITIES 98
#define ATA_IDENT_FIELDVALID 106
#define ATA_IDENT_MAX_LBA 120
#define ATA_IDENT_COMMANDSETS 164
#define ATA_IDENT_MAX_LBA_EXT 200
#define IDE_ATA 0x00
#define IDE_ATAPI 0x01
#define ATA_MASTER 0x00
#define ATA_SLAVE 0x01
#define ATA_REG_DATA 0x00
#define ATA_REG_ERROR 0x01
#define ATA_REG_FEATURES 0x01
#define ATA_REG_SECCOUNT0 0x02
#define ATA_REG_LBA0 0x03
#define ATA_REG_LBA1 0x04
#define ATA_REG_LBA2 0x05
#define ATA_REG_HDDEVSEL 0x06
#define ATA_REG_COMMAND 0x07
#define ATA_REG_STATUS 0x07
#define ATA_REG_SECCOUNT1 0x08
#define ATA_REG_LBA3 0x09
#define ATA_REG_LBA4 0x0A
#define ATA_REG_LBA5 0x0B
#define ATA_REG_CONTROL 0x0C
#define ATA_REG_ALTSTATUS 0x0C
#define ATA_REG_DEVADDRESS 0x0D
// Channels:
#define ATA_PRIMARY 0x00
#define ATA_SECONDARY 0x01
// Directions:
#define ATA_READ 0x00
#define ATA_WRITE 0x01
// Status
#define ATA_SR_BSY 0x80 // Busy
#define ATA_SR_DRDY 0x40 // Drive ready
#define ATA_SR_DF 0x20 // Drive write fault
#define ATA_SR_DSC 0x10 // Drive seek complete
#define ATA_SR_DRQ 0x08 // Data request ready
#define ATA_SR_CORR 0x04 // Corrected data
#define ATA_SR_IDX 0x02 // Index
#define ATA_SR_ERR 0x01 // Error
// Errors
#define ATA_ER_BBK 0x80 // Bad block
#define ATA_ER_UNC 0x40 // Uncorrectable data
#define ATA_ER_MC 0x20 // Media changed
#define ATA_ER_IDNF 0x10 // ID mark not found
#define ATA_ER_MCR 0x08 // Media change request
#define ATA_ER_ABRT 0x04 // Command aborted
#define ATA_ER_TK0NF 0x02 // Track 0 not found
#define ATA_ER_AMNF 0x01 // No address mark

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#pragma once
struct IDEChannelRegisters{
unsigned short base; // I/O Base.
unsigned short ctrl; // Control Base
unsigned short bmide; // Bus Master IDE
unsigned char nIEN; // IEN (no interrupt)
};
struct IDE_DEVICE {
unsigned char Reserved; // 0 (Empty) or 1 (This device exists).
unsigned char Channel; // 0 (Primary Channel) or 1 (Secondary Channel).
unsigned char Drive; // 0 (Master Drive) or 1 (Slave Drive).
unsigned short Type; // 0 ATA, 1:ATAPI
unsigned short Signature; // Drive Signature
unsigned short Capabilities; // Features.
unsigned int CommandSets; // Command Sets Supported.
unsigned int Size; // Size in Sectors (NOTE: Seems unused nowadays as i've only seen the value be zero
unsigned char Model[41]; // Model in string.
} ;
extern IDEChannelRegisters channels[2];
extern IDE_DEVICE ide_devices[4];
extern unsigned char ide_buf[2048];
extern unsigned char ide_irq_invoked;
extern unsigned char atapi_packet[12];

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#pragma once
#include <stdint-gcc.h>
#include "../../terminal/kterm.h"
#include "sampleIDE.definitions.h"
#include "ideCommands.h"
void Detect_IO_Ports(uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4);
void DetectDevices();
unsigned char ide_buf[2048] = {0};
unsigned char ide_irq_invoked = 0;
unsigned char atapi_packet[12] = {0xA8,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
void wait(int t){
volatile int i,j;
for(i=0;i<t;i++)
for(j=0;j<25000;j++)
asm("NOP");
}
void ide_write(unsigned char channel, unsigned char reg, unsigned char data){
if (reg > 0x07 && reg < 0x0C)
ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
if (reg < 0x08)
outb(channels[channel].base + reg - 0x00, data);
else if (reg < 0x0C)
outb(channels[channel].base + reg - 0x06, data);
else if (reg < 0x0E)
outb(channels[channel].ctrl + reg - 0x0A, data);
else if (reg < 0x16)
outb(channels[channel].bmide + reg - 0x0E, data);
if (reg > 0x07 && reg < 0x0C)
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
}
unsigned char ide_read(unsigned char channel, unsigned char reg){
unsigned char result;
if( reg > 0x07 && reg < 0x0C)
ide_write(channel,ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
if( reg < 0x08)
result = inb(channels[channel].base + reg - 0x00);
else if (reg < 0x0C)
result = inb(channels[channel].base + reg - 0x06);
else if (reg < 0x0E)
result = inb(channels[channel].ctrl + reg - 0x0A);
else if (reg < 0x16)
result = inb(channels[channel].bmide + reg - 0x0E);
if (reg > 0x07 && reg < 0x0C)
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
return result;
}
void ide_read_buffer(unsigned char channel, unsigned char reg, unsigned int buffer, unsigned int quads){
if (reg > 0x07 && reg < 0x0C)
ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
if (reg < 0x08)
insl(channels[channel].base + reg - 0x00, (void *)buffer, quads);
else if (reg < 0x0C)
insl(channels[channel].base + reg - 0x06, (void *)buffer, quads);
else if (reg < 0x0E)
insl(channels[channel].ctrl + reg - 0x0A, (void *)buffer, quads);
else if (reg < 0x16)
insl(channels[channel].bmide + reg - 0x0E, (void *)buffer, quads);
if (reg > 0x07 && reg < 0x0C)
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
}
unsigned char ide_polling(unsigned char channel, unsigned int advanced_check) {
// (I) Delay 400 nanosecond for BSY to be set:
// -------------------------------------------------
for(int i = 0; i < 4; i++)
ide_read(channel, ATA_REG_ALTSTATUS); // Reading the Alternate Status port wastes 100ns; loop four times.
// (II) Wait for BSY to be cleared:
// -------------------------------------------------
while (ide_read(channel, ATA_REG_STATUS) & ATA_SR_BSY)
; // Wait for BSY to be zero.
if (advanced_check) {
unsigned char state = ide_read(channel, ATA_REG_STATUS); // Read Status Register.
// (III) Check For Errors:
// -------------------------------------------------
if (state & ATA_SR_ERR)
return 2; // Error.
// (IV) Check If Device fault:
// -------------------------------------------------
if (state & ATA_SR_DF)
return 1; // Device Fault.
// (V) Check DRQ:
// -------------------------------------------------
// BSY = 0; DF = 0; ERR = 0 so we should check for DRQ now.
if ((state & ATA_SR_DRQ) == 0)
return 3; // DRQ should be set
}
return 0; // No Error.
}
unsigned char ide_print_error(unsigned int drive, unsigned char err) {
if (err == 0)
return err;
printf("IDE:");
if (err == 1) {printf("- Device Fault\n "); err = 19;}
else if (err == 2) {
unsigned char st = ide_read(ide_devices[drive].Channel, ATA_REG_ERROR);
if (st & ATA_ER_AMNF) {printf("- No Address Mark Found\n "); err = 7;}
if (st & ATA_ER_TK0NF) {printf("- No Media or Media Error\n "); err = 3;}
if (st & ATA_ER_ABRT) {printf("- Command Aborted\n "); err = 20;}
if (st & ATA_ER_MCR) {printf("- No Media or Media Error\n "); err = 3;}
if (st & ATA_ER_IDNF) {printf("- ID mark not Found\n "); err = 21;}
if (st & ATA_ER_MC) {printf("- No Media or Media Error\n "); err = 3;}
if (st & ATA_ER_UNC) {printf("- Uncorrectable Data Error\n "); err = 22;}
if (st & ATA_ER_BBK) {printf("- Bad Sectors\n "); err = 13;}
} else if (err == 3) {printf("- Reads Nothing\n "); err = 23;}
else if (err == 4) {printf("- Write Protected\n "); err = 8;}
printf("- [%s %s] %s\n",
(const char *[]){"Primary", "Secondary"}[ide_devices[drive].Channel], // Use the channel as an index into the array
(const char *[]){"Master", "Slave"}[ide_devices[drive].Drive], // Same as above, using the drive
ide_devices[drive].Model);
return err;
}
inline void init_IDE( uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4)
{
Detect_IO_Ports( BAR0, BAR1, BAR2, BAR3, BAR4);
printf("ATA Primary port, base: 0x%x, ctrl: 0x%x\n", channels[ATA_PRIMARY].base , channels[ATA_PRIMARY].ctrl);
printf("ATA Secondary port, base: 0x%x, ctrl: 0x%x\n", channels[ATA_SECONDARY].base , channels[ATA_SECONDARY].ctrl);
// 2- Disable IRQs:
ide_write(ATA_PRIMARY , ATA_REG_CONTROL, 2);
ide_write(ATA_SECONDARY, ATA_REG_CONTROL, 2);
DetectDevices();
return;
// 4- Print Summary:
for (int i = 0; i < 4; i++)
if (ide_devices[i].Reserved == 1) {
printf(" Found %s Drive %d bytes - %x\n",
(const char *[]){"ATA", "ATAPI"}[ide_devices[i].Type], /* Type */
ide_devices[i].Size / 2, /* Size */
ide_devices[i].Model);
}
}
// 3- Detect ATA-ATAPI Devices:
inline void DetectDevices(){
int i, j, k, count = 0;
for (i = 0; i < 2; i++)
for (j = 0; j < 2; j++) {
unsigned char err = 0, type = IDE_ATA, status;
ide_devices[count].Reserved = 0; // Assuming that no drive here.
// (I) Select Drive:
ide_write(i, ATA_REG_HDDEVSEL, 0xA0 | (j << 4)); // Select Drive.
wait(1000); // Wait 1ms for drive select to work.
// (II) Send ATA Identify Command:
ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY);
wait(1000);
// (III) Polling:
if (ide_read(i, ATA_REG_STATUS) == 0) continue; // If Status = 0, No Device.
while(1) {
status = ide_read(i, ATA_REG_STATUS);
if ((status & ATA_SR_ERR)) {err = 1; break;} // If Err, Device is not ATA.
if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRQ)) break; // Everything is right.
}
// (IV) Probe for ATAPI Devices:
if (err != 0) {
unsigned char cl = ide_read(i, ATA_REG_LBA1);
unsigned char ch = ide_read(i, ATA_REG_LBA2);
if (cl == 0x14 && ch ==0xEB)
type = IDE_ATAPI;
else if (cl == 0x69 && ch == 0x96)
type = IDE_ATAPI;
else
continue; // Unknown Type (may not be a device).
ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY_PACKET);
wait(1000);
}
// (V) Read Identification Space of the Device:
ide_read_buffer(i, ATA_REG_DATA, (unsigned int) ide_buf, 128);
// (VI) Read Device Parameters:
ide_devices[count].Reserved = 1;
ide_devices[count].Type = type;
ide_devices[count].Channel = i;
ide_devices[count].Drive = j;
ide_devices[count].Signature = *((unsigned short *)(ide_buf + ATA_IDENT_DEVICETYPE));
ide_devices[count].Capabilities = *((unsigned short *)(ide_buf + ATA_IDENT_CAPABILITIES));
ide_devices[count].CommandSets = *((unsigned int *)(ide_buf + ATA_IDENT_COMMANDSETS));
// (VII) Get Size:
if (ide_devices[count].CommandSets & (1 << 26))
// Device uses 48-Bit Addressing:
ide_devices[count].Size = *((unsigned int *)(ide_buf + ATA_IDENT_MAX_LBA_EXT));
else
// Device uses CHS or 28-bit Addressing:
ide_devices[count].Size = *((unsigned int *)(ide_buf + ATA_IDENT_MAX_LBA));
// (VIII) String indicates model of device (like Western Digital HDD and SONY DVD-RW...):
for(k = 0; k < 40; k += 2) {
ide_devices[count].Model[k] = ide_buf[ATA_IDENT_MODEL + k + 1];
ide_devices[count].Model[k + 1] = ide_buf[ATA_IDENT_MODEL + k];}
ide_devices[count].Model[40] = 0; // Terminate String.
count++;
}
}
inline void Detect_IO_Ports(uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4){
// 1 Detect I/O Ports which interface an IDE Controller
// Based on the implementation within serenity
channels[ATA_PRIMARY].base = (BAR0 == 0x1 || BAR0 == 0x0) ? 0x1F0 : BAR0 & (~1);
channels[ATA_PRIMARY ].ctrl = (BAR1 == 0x1 || BAR1 == 0x0) ? 0x3F6 : BAR1 & (~1);
channels[ATA_SECONDARY].base = (BAR2 == 0x1 || BAR2 == 0x0) ? 0x170 : BAR2 & (~1);
channels[ATA_SECONDARY].ctrl = (BAR3 == 0x1 || BAR3 == 0x0) ? 0x376 : BAR3 & (~1);
channels[ATA_PRIMARY ].bmide = (BAR4 & (~1)) + 0; // Bus Master IDE
channels[ATA_SECONDARY].bmide = (BAR4 & (~1)) + 8; // Bus Master IDE
}
bool driveAvailable(){
int devNumber = 0;
for ( auto device : ide_devices){
if(!device.Reserved)
continue;
devNumber++;
}
// FIXME: If no drive is connected we continue trying to read from
// a not connected drive!
//ATAPIO::Identify((uint16_t) BUS_PORT::Primary, DEVICE_DRIVE::MASTER);
return true;
}

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//
// Created by nigel on 21/02/23.
//
#include "FileSystem.h"
void FileSystem::WriteFile(int file, unsigned char* buffer, unsigned int length) {
}
void FileSystem::ReadFile(int file, unsigned char* buffer, unsigned int length) {
}
FILE FileSystem::OpenFile(const char* fname){
if(fname){
unsigned char device = 'a';
char* filename = (char*) fname;
if(fname[1]== ':'){
device = fname[0];
filename += 2; // strip the volume component from the path
}
if(_filesystems[device - 'a']){
FILE file = _filesystems[device-'a']->Open(filename);
file.device = device;
return file;
}
}
FILE file;
file.flags = FS_INVALID;
return file;
}
void FileSystem::CloseFile(PFILE file) {
if(file->device < DEVICE_MAX){
// _filesystems[file->device]->Close(file);
}
}

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//
// Created by nigel on 21/02/23.
//
#pragma once
#include "StorageTypes.h"
class FileSystem {
public:
static void WriteFile(PFILE file, unsigned char* beffer, unsigned int length);
static void ReadFile(PFILE file, unsigned char* buffer, unsigned int length);
static FILE OpenFile(const char* fname);
static void CloseFile(PFILE file);
};

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//
// Created by nigel on 21/02/23.
//
#include "Inode.h"

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//
// Created by nigel on 21/02/23.
//
#pragma once
enum struct NODE_TYPE {
FILESYSTEM,
FILE,
DIRECTORY
};
enum struct PERMISSIONS {
READ,
WRITE,
EXECUTE
};
struct Inode {
NODE_TYPE type;
PERMISSIONS permissions;
Inode* Parent;
Inode* sibling;
};

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//
// Created by nigel on 21/02/23.
//
#pragma once
#include <stdint-gcc.h>
enum FS_TYPES {
FS_FILE =0,
FS_DIRECTORY =1,
FS_INVALID=2
};
typedef struct _FILE {
char name [32];
uint32_t flags;
uint32_t filelength;
uint32_t id;
uint32_t eof;
uint32_t position;
uint32_t currentCluster;
uint32_t device;
}FILE, *PFILE;
typedef struct _FILE_SYSTEM{
char name[8];
FILE (*Directory) (const char* Directoryname);
void (*Mount) ();
void (*Read) (PFILE file, unsigned char* buffer, unsigned int length);
void (Close) (PFILE);
FILE (*Open) (const char* filename);
}FILESYSTEM, *PFS;

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#include "VFS.h"
#include <stdint-gcc.h>
#include "../../memory/KernelHeap.h"
#include <CoreLib/Memory.h>
PFS VirtualFileSystem::_filesystems[VirtualFileSystem::DEVICE_MAX];
void VirtualFileSystem::initialize()
{
}
void VirtualFileSystem::ResolvePath(Path &path)
{
// See reference material (1) https://man7.org/linux/man-pages/man7/path_resolution.7.html
char* string_path = path.str();
void* cpy = string_path;
bool isAbsolutePath = string_path[0] == '/';
if(isAbsolutePath)
{
// strip the first slash
string_path++;
}
char* tokstate = NULL;
char* nextdir = strtok(string_path, "/", &tokstate);
while (nextdir)
{
printf("First entry to look for: %s\n", nextdir);
nextdir = strtok(NULL, "/", &tokstate);
}
free(cpy);
}
void VirtualFileSystem::Mount(PFS filesystemDescriptor, unsigned int DeviceID)
{
if(DeviceID < DEVICE_MAX)
if(filesystemDescriptor)
_filesystems[DeviceID] = filesystemDescriptor;
}
void VirtualFileSystem::Unmount(unsigned int DeviceID) {
if(DeviceID < DEVICE_MAX)
_filesystems[DeviceID] = nullptr;
}

17
kernel/storage/vfs/VFS.h Normal file
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#pragma once
#include <stdint-gcc.h>
#include "../../../CoreLib/Path.h"
#include "StorageTypes.h"
class VirtualFileSystem
{
public:
static void initialize();
static void Mount(PFS fs, unsigned int DeviceID);
static void Unmount(unsigned int DeviceID);
static void ResolvePath(Path& path);
private:
static const unsigned int DEVICE_MAX = 26;
static PFS _filesystems[DEVICE_MAX];
};