Improved build system

Added new entries to .gitignore Moved away from source directory as central spot for all source code
2023-02-20 00:29:06 +01:00
parent 2bcc79216e
commit dea8ab7d71
105 changed files with 140 additions and 156 deletions
--- a/kernel/drivers/acpi/acpi.cpp
+++ b/kernel/drivers/acpi/acpi.cpp
@ -0,0 +1,15 @@
+#include "acpi.h"
+RSDPTR* ACPI::rsd_ptr;
+RSDT* ACPI::rsd_table;
+
+
+
+void ACPI::initialize(){
+
+    // Find the Root System Description Pointer
+    ACPI::rsd_ptr = FindRSD();
+    printRSD(rsd_ptr);
+
+    //  Get the Root System Description Table
+    ACPI::rsd_table = getRSDT((RSDPTR*)((uint32_t)rsd_ptr + 0xC00000000));
+}
--- a/kernel/drivers/acpi/acpi.h
+++ b/kernel/drivers/acpi/acpi.h
@ -0,0 +1,13 @@
+#pragma once 
+#include "rsdp.h"
+class ACPI {
+    public:
+        static void initialize();
+        
+        // In the future ACPI might start
+        // doing more systems initialization
+        
+    private:
+       static RSDPTR* rsd_ptr;
+       static RSDT* rsd_table;
+};
--- a/kernel/drivers/acpi/rsdp.cpp
+++ b/kernel/drivers/acpi/rsdp.cpp
@ -0,0 +1,45 @@
+#include "rsdp.h"
+
+void printRSD(RSDPTR* rsd){
+    printf("Signature: ");
+    for(int i = 0; i < 8; i++){
+        kterm_put(rsd->signature[i]);
+    }
+    kterm_put('\n');
+
+    printf("OEMID: ");
+    for(int i =0; i < 6 ; i++){
+        kterm_put (rsd->OEMID[i]);
+    }
+    kterm_put('\n');
+
+    printf("Revision: %d\n", rsd->Revision);
+    printf("RSDT Address: 0x%x\n", rsd->RsdtAddress );
+}
+
+RSDPTR* FindRSD(){
+    char* memory_byte = (char*) 0xC00f2e14;
+    const void* string = "RSD PTR ";
+
+    for( ; (uint32_t) memory_byte < 0xC0100000; memory_byte+=10){
+        if( memcmp(memory_byte , string , 8 ) ==  0 ) {
+        printf("RSD PTR found at 0x%x !\n", memory_byte);
+        break;
+        }
+    }
+
+    return (RSDPTR*) memory_byte;
+}
+
+
+RSDT* getRSDT(RSDPTR* rsd){
+
+        RSDT* rsdt = (RSDT*) rsd->RsdtAddress;
+
+        printf("OEMID: ");
+        for(int i = 0; i < 6; i++){
+            kterm_put(rsdt->header.OEMID[i]);
+        }
+        kterm_put('\n');
+        return rsdt;
+}
--- a/kernel/drivers/acpi/rsdp.h
+++ b/kernel/drivers/acpi/rsdp.h
@ -0,0 +1,35 @@
+#pragma once
+#include <stdint.h>
+#include "./../../terminal/kterm.h"
+#include <CoreLib/Memory.h>
+
+struct RSDPTR {
+    char signature[8];
+    uint8_t Checksum ;
+    char OEMID [6];
+    uint8_t Revision;
+    uint32_t RsdtAddress;
+}__attribute__((packed));
+
+struct ACPISDTHeader{
+    char Signature[4];
+    uint32_t Length;
+    uint8_t CheckSum;
+    char OEMID[6];
+    char OEMTableID[8];
+    uint32_t OEMRevision;
+    uint32_t CreatorID;
+    uint32_t CreatorRevision;
+}__attribute__((packed));
+
+
+struct RSDT{
+    struct ACPISDTHeader header;
+    uint32_t PointerToSDT[]; // Length of array : (header.Length - sizeof(header))/ 4
+}__attribute__((packed));
+
+RSDPTR* FindRSD();
+
+void printRSD(RSDPTR* rsd);
+
+RSDT* getRSDT(RSDPTR* rsd);
--- a/kernel/drivers/ata/ataDevice.cpp
+++ b/kernel/drivers/ata/ataDevice.cpp
@ -0,0 +1,193 @@
+#include "ataDevice.h"
+#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1) 
+
+void ATA_DEVICE::Soft_Reset(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive){
+        printf("Soft reseting drive...\n");
+        outb(channels[DEVICE_CHANNEL].base + 7 , 0x4);
+        // wait a bit..
+        for(int i = 0 ; i < 1000000; i++){
+            asm volatile("NOP");
+        }   
+        outb(channels[DEVICE_CHANNEL].base + 7 , 0x0);
+
+}
+
+void ATA_DEVICE::Identify(uint16_t DEVICE_CHANNEL,DEVICE_DRIVE drive ){
+    // lets ignore which port we actually want to check for now !
+
+    /*
+        THE STEPS INVOLVED
+
+        1. Select the target drive by sending master (0x0A) or slave (0x0B) to the 
+        drive select IO port
+
+        2. Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0 
+
+        3. Send the identify command (0xEC) to the command IO port 
+
+        4. Read the status port 
+            4.2 If the value is 0x0 the drive does not exist
+            4.3 If it has any other value continue
+        5. poll the status port until bit 7 is clear.
+        6. Check if the LBAmid and LBAhi ports are non-zero
+            6.2. If non-zero stop polling this is not an ATA device
+            6.3 If zero continue
+        
+        7. poll status port until bit 3 is set or bit 0 is set
+
+        8. if err is clear, read the data from the data port 
+
+
+    */
+
+   
+    //printf("channel selected: 0x%x", DEVICE_CHANNEL);
+    // Assuming Master here 
+    // Select the target drive
+    outb(DEVICE_CHANNEL | 6, drive); // on the primary bus select the master drive
+    outb(DEVICE_CHANNEL | 6 , 0x0); // write 0 to the controlport for some reason
+
+    outb(DEVICE_CHANNEL | 6, drive);
+    uint8_t status = inb(DEVICE_CHANNEL | 7 );
+    if(status == 0x00){
+        printf("No drive\n");
+        return;
+    }
+    // send the identify command;
+    outb(DEVICE_CHANNEL | 7, 0xEC);
+
+  
+   // set the sectorCount, LBAlo, LBAmid, LBA,hi IO ports to 0
+   outb(DEVICE_CHANNEL | 2, 0);
+
+   outb(DEVICE_CHANNEL | 3, 0);
+
+   outb(DEVICE_CHANNEL | 4, 0);
+
+   outb(DEVICE_CHANNEL | 5, 0);
+
+   // send the identify command ;
+   //printf("command sent!\n");
+   outb(DEVICE_CHANNEL | 7 , 0xEC);
+
+   // read the status port 
+   uint8_t status2 = inb(DEVICE_CHANNEL | 7);
+   if( status2 == 0x00){
+       printf("No drive\n");
+       return;
+   }
+
+   //printf("Waiting until ready...\n");
+   while(((status2 & 0x80 == 0x80) 
+   && (status2 & 0x01) != 0x01)
+   ) status2 = inb(DEVICE_CHANNEL | 7);
+
+   if( status2 & 0x01){
+       printf("Error!\n");
+       return ;
+   }
+
+    uint16_t deviceIdentify [256] = {0};
+
+    for ( int i = 0; i < 256; i++){
+        uint16_t data;
+        asm volatile ("inw %1, %0" : "=a"(data): "Nd"(DEVICE_CHANNEL));
+
+        deviceIdentify[i] = data;
+    }
+
+
+    printf("Model-label (ASCII hex): ");
+    for(int i = 27; i < 47; i++){
+        kterm_put((char)(deviceIdentify[i] >> 8));
+        kterm_put((char)(deviceIdentify[i] & 0x00FF));
+    }
+    kterm_put('\n');
+
+}
+
+void ATA_DEVICE::Read(uint16_t DEVICE_CHANNEL,  DEVICE_DRIVE drive, uint32_t LBA, uint16_t* buffer) {
+    /*
+    Assume you have a sectorcount byte and a 28 bit LBA value. A sectorcount of 0 means 256 sectors = 128K.
+
+    Notes:  - When you send a command byte and the RDY bit of the Status Registers is clear, you may have to wait (technically up to 30 seconds) for the drive to spin up, before DRQ sets. You may also need to ignore ERR and DF the first four times that you read the Status, if you are polling.
+            - for polling PIO drivers: After transferring the last uint16_t of a PIO data block to the data IO port, give the drive a 400ns delay to reset its DRQ bit (and possibly set BSY again, while emptying/filling its buffer to/from the drive).
+            - on the "magic bits" sent to port 0x1f6: Bit 6 (value = 0x40) is the LBA bit. This must be set for either LBA28 or LBA48 transfers. It must be clear for CHS transfers. Bits 7 and 5 are obsolete for current ATA drives, but must be set for backwards compatibility with very old (ATA1) drives.
+    
+    An example of a 28 bit LBA PIO mode read on the Primary bus:
+    
+    */
+    
+    const int sectorCount = 1;
+
+    // Floating bus check
+    uint8_t floatingBus  = inb(DEVICE_CHANNEL | 7);
+    if (floatingBus == 0xFF){
+        printf("Floating bus!!");
+        return ;
+    }
+
+    //printf("Read LBA: 0x%x\n", LBA);
+    // Send 0xE0 for the "master" or 0xF0 for the "slave", ORed with the highest 4 bits of the LBA to port 0x1F6: outb(0x1F6, 0xE0 | (slavebit << 4) | ((LBA >> 24) & 0x0F))
+    outb(DEVICE_CHANNEL | 6 , ( 0xE0 | (LBA >>28) ) );
+    // Send a NULL byte to port 0x1F1, if you like (it is ignored and wastes lots of CPU time): outb(0x1F1, 0x00)
+    outb(DEVICE_CHANNEL | 1, 0x0000 );
+    //Send the sectorcount to port 0x1F2: outb(0x1F2, (unsigned char) count)
+    outb(DEVICE_CHANNEL | 2, sectorCount);
+    //Send the low 8 bits of the LBA to port 0x1F3: outb(0x1F3, (unsigned char) LBA))
+    outb(DEVICE_CHANNEL | 3, LBA);
+    //Send the next 8 bits of the LBA to port 0x1F4: outb(0x1F4, (unsigned char)(LBA >> 8))
+    outb(DEVICE_CHANNEL | 4, (LBA >> 8));
+    //Send the next 8 bits of the LBA to port 0x1F5: outb(0x1F5, (unsigned char)(LBA >> 16))
+    outb(DEVICE_CHANNEL | 5, (LBA >> 16));
+    //Send the "READ SECTORS" command (0x20) to port 0x1F7: outb(0x1F7, 0x20)
+    outb(DEVICE_CHANNEL | 7, 0x20);
+
+    volatile int i,j;
+        for(i=0;i<2000;i++)
+            for(j=0;j<25000;j++)
+                asm("NOP");
+
+    //Wait for an IRQ or poll.
+    uint8_t status = inb(DEVICE_CHANNEL | 7);
+    if( status == 0x00){
+        printf("No drive\n");
+        return;
+    }
+
+    //printf("Status: %x\n", status);
+    // Check if busy!
+    while((status & 0x80) == 0x80){
+        printf("Reading....\r");
+        status = inb(DEVICE_CHANNEL | 7);
+    }
+    
+    
+    if ((status & 0x01) == 0x01){
+        printf("Error occured during read!\n");
+        return;
+    }
+
+    //Transfer 256 16-bit values, a uint16_t at a time, into your buffer from I/O port 0x1F0.    
+     if( status & 0x01){
+        printf("Error!\n");
+        printf("Status: 0x%x\n", status);
+        uint16_t error_register = inb(DEVICE_CHANNEL | 1);
+        printf("Error register 0x%x\n",error_register );
+        return ;
+    }
+    for ( int i = 0; i < 256; i++){
+        uint16_t data;
+        asm volatile ("inw %1, %0" : "=a"(data): "Nd"(DEVICE_CHANNEL));
+       // printf (" %x ", data);
+
+        buffer[i] = data;
+    }
+    
+    //Then loop back to waiting for the next IRQ (or poll again -- see next note) for each successive sector.
+
+}
+
+void ATA_DEVICE::Write(uint16_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
+    printf("Not implemented\n");
+}
--- a/kernel/drivers/ata/ataDevice.h
+++ b/kernel/drivers/ata/ataDevice.h
@ -0,0 +1,27 @@
+#pragma once
+#include <stdint.h>
+#include "../io/io.h"
+#include "../ide/ideCommands.h"
+#include "../ide/sampleIDE.definitions.h"
+
+#include "../../terminal/kterm.h"
+
+/*
+* This first driver wil make use of IO ports.
+* Doing so means reading or writing from disk is going
+* to be very cpu intensive.
+*/
+
+enum DEVICE_DRIVE{
+    MASTER = 0xA0,
+    SLAVE = 0xB0
+};
+
+namespace ATA_DEVICE{
+    void Identify(uint16_t, DEVICE_DRIVE);
+    void Read (uint16_t, DEVICE_DRIVE, uint32_t, uint16_t*);
+    void Write(uint16_t, DEVICE_DRIVE);
+    void Soft_Reset(uint8_t ,DEVICE_DRIVE );
+};
+
+
--- a/kernel/drivers/atapi/atapiDevice.cpp
+++ b/kernel/drivers/atapi/atapiDevice.cpp
@ -0,0 +1,145 @@
+#include "atapiDevice.h"
+#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1) 
+
+bool isPacketDevice(){
+ 
+    uint8_t LBAmid = inb(0x174);
+    uint8_t LBAhi = inb(0x175);
+
+    printf(" LBAmid: 0x%x, LBAhi: 0x%x");
+    return LBAmid == 0x14 && LBAhi == 0xEB;
+
+}
+
+
+void ATAPI_DEVICE::Identify(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive ){
+    // lets ignore which port we actually want to check for now !
+
+    /*   THE STEPS INVOLVED
+      
+        1. Select the target drive by sending master (0x0A) or slave (0x0B) to the 
+        drive select IO port
+
+        2. Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0 
+
+        3. Send the identify command (0xEC) to the command IO port 
+
+        4. Read the status port 
+            4.2 If the value is 0x0 the drive does not exist
+            4.3 If it has any other value continue
+        5. poll the status port until bit 7 is clear.
+        6. Check if the LBAmid and LBAhi ports are non-zero
+            6.2. If non-zero stop polling this is not an ATA device
+            6.3 If zero continue
+        
+        7. poll status port until bit 3 is set or bit 0 is set
+
+        8. if err is clear, read the data from the data port 
+
+
+    */
+
+    // Select the target drive
+    outb(0x176, 0xA0); // on the secondary bus select the master drive
+    outb(0x170 + 0x206 , 0x0); // write 0 to the controlport for some reason
+
+    outb(0x176, 0xA0);
+    // read the status port
+    uint8_t status = inb(0x177);
+    printf("status after drive select: 0x%x\n",status);
+    if( status == 0x00){
+        printf("No drive\n");
+        return;
+    }
+
+    outb(0x176, 0xA0);
+
+
+    // Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
+    outb(0x172, 0); 
+
+    outb(0x173, 0); 
+
+    outb(0x174, 0); 
+
+    outb(0x175, 0);
+
+    // send the identify command;
+    printf("command sent!\n");
+    outb(0x177, 0xA1);
+
+    // read the status port
+    uint8_t status2 = inb(0x177);
+    if( status2 == 0x00){
+        printf("No drive\n");
+        return;
+    }
+
+
+    printf("Waiting until ready...\n");
+
+    while(((status2 & 0x80 == 0x80)
+        && (status2 & 0x01) != 0x01)
+     ) status2 = inb(0x177);
+       
+
+    if(status2  & 0x01){
+        printf("Error!");
+        return;
+    }
+   
+
+    // READ DATA
+
+    uint16_t deviceIdentify [256] ={0};
+
+    for (int i= 0; i < 256; i++){
+           uint16_t data;
+            asm volatile ( "in %1, %0"
+                   : "=a"(data)
+                   : "Nd"(0x170) );
+
+        
+        deviceIdentify[i] =  data ;
+        
+
+    }
+    
+    printf("Model-label (ASCII hex):\n");
+    for(int i = 27; i < 47; i++){
+        printf(" %x ",deviceIdentify[i]);
+    }
+
+    printf("\nSerial number (ASCII hex):\n");
+    for (int i = 10; i < 19; i++){
+        printf(" %x ", deviceIdentify[i]);
+    }
+
+    printf("\nFirmware revision (ASCII hex):\n");
+    for (int i = 23; i < 26; i++){
+        printf(" %x ", deviceIdentify[i]);
+    }
+
+    printf("\nConfiguration: %x\n", deviceIdentify[0]);
+
+   
+
+    printf("\nData received!\n");
+
+    
+  
+
+
+
+}
+
+
+void ATAPI_DEVICE::Read(uint8_t DEVICE_CHANNEL,  DEVICE_DRIVE drive) {
+    printf("Not implemented");
+}
+
+void ATAPI_DEVICE::Write(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
+    printf("Not implemented");
+}
+
+
--- a/kernel/drivers/atapi/atapiDevice.h
+++ b/kernel/drivers/atapi/atapiDevice.h
@ -0,0 +1,29 @@
+#pragma once
+#include <stdint.h>
+#include "../io/io.h"
+#include "../ide/ideCommands.h"
+#include "../ide/sampleIDE.definitions.h"
+
+#include "../../terminal/kterm.h"
+
+/*
+* This first driver wil make use of IO ports.
+* Doing so means reading or writing from disk is going
+* to be very cpu intensive.
+* 
+*/
+
+enum DEVICE_DRIVE{
+    MASTER = 0xA0,
+    SLAVE = 0xB0
+};
+
+
+namespace ATAPI_DEVICE
+{
+    bool isPacketDevice();
+    void Identify   ( uint8_t,    DEVICE_DRIVE );
+    void Read       ( uint8_t,    DEVICE_DRIVE );
+    void Write      ( uint8_t,    DEVICE_DRIVE );
+    
+};
--- a/kernel/drivers/cmos/cmos.cpp
+++ b/kernel/drivers/cmos/cmos.cpp
@ -0,0 +1,38 @@
+void ReadFromCMOS(unsigned char array[])
+{
+    unsigned char tvalue, index;
+
+    for (index = 0; index < 128; index++)
+    {
+        asm(
+            "cli\n\t"           // Disable interrupts
+            "mov al, index\n\t" // Move index address
+            // since the 0x80 bit of al is not set, NMI is active 
+            "out 0x70,al\n\t" // Copy address to CMOS register
+            // some kind of real delay here is probably best 
+            "in al,0x71\n\t" // Fetch 1 byte to al
+            "sti\n\t"        // Enable interrupts
+            "mov tvalue,al\n\t");
+
+        array[index] = tvalue;
+    }
+}
+
+void WriteTOCMOS(unsigned char array[])
+{
+   unsigned char index;
+ 
+   for(index = 0; index < 128; index++)
+   {
+      unsigned char tvalue = array[index];
+      
+       asm("cli\n\t"       // Clear interrupts
+         "mov al,index\n\t"    // move index address
+         "out 0x70,al\n\t"     // copy address to CMOS register
+         // some kind of real delay here is probably best 
+         "mov al,tvalue\n\t"   // move value to al
+         "out 0x71,al\n\t"   // write 1 byte to CMOS
+         "sti\n\\t"   );        // Enable interrupts
+      
+   }
+}
--- a/kernel/drivers/ide/ide.h
+++ b/kernel/drivers/ide/ide.h
@ -0,0 +1,98 @@
+#pragma once
+#include <stdint.h> 
+#include "../pci/pciDevice.h"
+#include "../pci/pci.h"
+#include "../../terminal/kterm.h"
+#include "ideCommands.h"
+#include "sampleIDE.h"
+
+#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1) 
+
+IDEChannelRegisters channels[2];
+IDE_DEVICE ide_devices[4];
+
+inline void CheckProgIF(uint8_t ProgIF){
+    if( IS_BIT_SET(ProgIF, 0) ) // Is the 0th bit set
+    {
+        printf ("Primary Channel is in PCI native mode\n");
+    } else{
+        printf("Primary Channel is in Compatibility mode\n");
+    }
+
+    if( IS_BIT_SET(ProgIF, 1)){
+        printf("Bit 0 can be modified\n");
+    }else{
+        printf("Bit 0 cannot be modified\n");
+    }
+    
+    if( IS_BIT_SET(ProgIF, 2)){
+        printf("Secondary channel is in PCI native mode\n");
+    }else{
+        printf("Secondary channel is in Compatibility mode\n");
+    }
+    
+    if( IS_BIT_SET(ProgIF, 3)){
+        printf("Bit 2 can be modified\n");
+    }else{
+        printf("Bit 2 cannot be modified\n");
+    }
+
+
+    if( IS_BIT_SET(ProgIF , 7)){
+        printf("This is a bus master IDE Controller\n");
+    } else{
+        printf("This controller doesn't support DMA!\n");
+    }
+
+}
+
+inline void TestIDEController(){
+    // Do stuff
+    printf("Testing IDE controllers\n");
+
+    // NOTE: Testing done with a hard coded known PCI addres 
+    // Of an intel PIIX3 IDE Controller
+    int bus = 0;
+    int device =1  , function = 1;
+    PCIBusAddress IDEControllerPCIAddress = PCIBusAddress{bus,device, function};
+
+    uint8_t ProgIF = PCI::GetProgIF(IDEControllerPCIAddress);
+    printf( "ProgIF: 0x%x\n" ,ProgIF);
+
+    //CheckProgIF(ProgIF);
+
+    // For this test will just assume all bits are set 
+    // the CheckProgIF can check but on the test machine all bits are set anyways
+
+    uint32_t BAR0,BAR1,BAR2,BAR3, BAR4;
+
+    BAR0 = PCI::ReadBAR(IDEControllerPCIAddress, 0);
+
+    BAR1 = PCI::ReadBAR(IDEControllerPCIAddress, 1);
+
+    BAR2 = PCI::ReadBAR(IDEControllerPCIAddress, 2);
+
+    BAR3 = PCI::ReadBAR(IDEControllerPCIAddress, 3);
+
+    BAR4 = PCI::ReadBAR(IDEControllerPCIAddress, 4);
+
+    // All bars are return 0xffffff for some as of yet mysterious reason!
+    printf( "BAR 0: 0x%x\n", BAR0);
+
+    printf( "BAR 1: 0x%x\n", BAR1);
+
+    printf( "BAR 2: 0x%x\n", BAR2);
+
+    printf( "BAR 3: 0x%x\n", BAR3);
+
+    printf( "BAR 4: 0x%x\n", BAR4);
+
+    init_IDE(BAR0, BAR1, BAR2, BAR3, BAR4);
+    
+    // Read Something from disc
+    unsigned int maxByteCount = 20 ;
+    void* MDA_buffer = (void*)0xC0000000;
+
+
+
+}
--- a/kernel/drivers/ide/ideCommands.h
+++ b/kernel/drivers/ide/ideCommands.h
@ -0,0 +1,86 @@
+#pragma once
+
+// Commands
+#define ATA_CMD_READ_PIO          0x20
+#define ATA_CMD_READ_PIO_EXT      0x24
+#define ATA_CMD_READ_DMA          0xC8
+#define ATA_CMD_READ_DMA_EXT      0x25
+#define ATA_CMD_WRITE_PIO         0x30
+#define ATA_CMD_WRITE_PIO_EXT     0x34
+#define ATA_CMD_WRITE_DMA         0xCA
+#define ATA_CMD_WRITE_DMA_EXT     0x35
+#define ATA_CMD_CACHE_FLUSH       0xE7
+#define ATA_CMD_CACHE_FLUSH_EXT   0xEA
+#define ATA_CMD_PACKET            0xA0
+#define ATA_CMD_IDENTIFY_PACKET   0xA1
+#define ATA_CMD_IDENTIFY          0xEC
+
+#define ATAPI_CMD_READ       0xA8
+#define ATAPI_CMD_EJECT      0x1B
+
+#define ATA_IDENT_DEVICETYPE   0
+#define ATA_IDENT_CYLINDERS    2
+#define ATA_IDENT_HEADS        6
+#define ATA_IDENT_SECTORS      12
+#define ATA_IDENT_SERIAL       20
+#define ATA_IDENT_MODEL        54
+#define ATA_IDENT_CAPABILITIES 98
+#define ATA_IDENT_FIELDVALID   106
+#define ATA_IDENT_MAX_LBA      120
+#define ATA_IDENT_COMMANDSETS  164
+#define ATA_IDENT_MAX_LBA_EXT  200
+
+#define IDE_ATA        0x00
+#define IDE_ATAPI      0x01
+ 
+#define ATA_MASTER     0x00
+#define ATA_SLAVE      0x01
+
+
+#define ATA_REG_DATA       0x00
+#define ATA_REG_ERROR      0x01
+#define ATA_REG_FEATURES   0x01
+#define ATA_REG_SECCOUNT0  0x02
+#define ATA_REG_LBA0       0x03
+#define ATA_REG_LBA1       0x04
+#define ATA_REG_LBA2       0x05
+#define ATA_REG_HDDEVSEL   0x06
+#define ATA_REG_COMMAND    0x07
+#define ATA_REG_STATUS     0x07
+#define ATA_REG_SECCOUNT1  0x08
+#define ATA_REG_LBA3       0x09
+#define ATA_REG_LBA4       0x0A
+#define ATA_REG_LBA5       0x0B
+#define ATA_REG_CONTROL    0x0C
+#define ATA_REG_ALTSTATUS  0x0C
+#define ATA_REG_DEVADDRESS 0x0D
+
+// Channels:
+#define      ATA_PRIMARY      0x00
+#define      ATA_SECONDARY    0x01
+ 
+// Directions:
+#define      ATA_READ      0x00
+#define      ATA_WRITE     0x01
+
+
+// Status
+#define ATA_SR_BSY     0x80    // Busy
+#define ATA_SR_DRDY    0x40    // Drive ready
+#define ATA_SR_DF      0x20    // Drive write fault
+#define ATA_SR_DSC     0x10    // Drive seek complete
+#define ATA_SR_DRQ     0x08    // Data request ready
+#define ATA_SR_CORR    0x04    // Corrected data
+#define ATA_SR_IDX     0x02    // Index
+#define ATA_SR_ERR     0x01    // Error
+
+
+// Errors
+#define ATA_ER_BBK      0x80    // Bad block
+#define ATA_ER_UNC      0x40    // Uncorrectable data
+#define ATA_ER_MC       0x20    // Media changed
+#define ATA_ER_IDNF     0x10    // ID mark not found
+#define ATA_ER_MCR      0x08    // Media change request
+#define ATA_ER_ABRT     0x04    // Command aborted
+#define ATA_ER_TK0NF    0x02    // Track 0 not found
+#define ATA_ER_AMNF     0x01    // No address mark
--- a/kernel/drivers/ide/sampleIDE.definitions.h
+++ b/kernel/drivers/ide/sampleIDE.definitions.h
@ -0,0 +1,29 @@
+#pragma once 
+
+struct IDEChannelRegisters{
+    unsigned short base; // I/O Base.
+    unsigned short ctrl; // Control Base
+    unsigned short bmide; // Bus Master IDE
+    unsigned char nIEN; // IEN (no interrupt)
+};
+
+
+struct IDE_DEVICE {
+    unsigned char Reserved; // 0 (Empty) or 1 (This device exists).
+    unsigned char Channel; // 0 (Primary Channel) or 1 (Secondary Channel).
+    unsigned char Drive; // 0 (Master Drive) or 1 (Slave Drive).
+    unsigned short Type; // 0 ATA, 1:ATAPI
+    unsigned short Signature; // Drive Signature
+    unsigned short Capabilities; // Features.
+    unsigned int CommandSets; // Command Sets Supported.
+    unsigned int Size; // Size in Sectors (NOTE: Seems unused nowadays as i've only seen the value be zero
+    unsigned char Model[41]; // Model in string.
+} ;
+
+
+
+extern IDEChannelRegisters channels[2];
+extern IDE_DEVICE ide_devices[4];
+extern unsigned char ide_buf[2048];
+extern unsigned  char ide_irq_invoked;
+extern unsigned  char atapi_packet[12];
--- a/kernel/drivers/ide/sampleIDE.h
+++ b/kernel/drivers/ide/sampleIDE.h
@ -0,0 +1,242 @@
+#pragma once
+#include <stdint.h> 
+#include "../../terminal/kterm.h"
+#include "sampleIDE.definitions.h"
+#include "ideCommands.h"
+
+void Detect_IO_Ports(uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4);
+void DetectDevices();
+
+unsigned char ide_buf[2048] = {0};
+unsigned  char ide_irq_invoked = 0;
+unsigned  char atapi_packet[12] = {0xA8,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+
+void wait(int t){
+    volatile int i,j;
+    for(i=0;i<t;i++)
+        for(j=0;j<25000;j++)
+            asm("NOP");
+}
+
+void ide_write(unsigned char channel, unsigned char reg, unsigned char data){
+    if (reg > 0x07 && reg < 0x0C)
+      ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
+    if (reg < 0x08)
+      outb(channels[channel].base  + reg - 0x00, data);
+    else if (reg < 0x0C)
+      outb(channels[channel].base  + reg - 0x06, data);
+    else if (reg < 0x0E)
+      outb(channels[channel].ctrl  + reg - 0x0A, data);
+    else if (reg < 0x16)
+      outb(channels[channel].bmide + reg - 0x0E, data);
+    if (reg > 0x07 && reg < 0x0C)
+      ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
+}
+
+unsigned char ide_read(unsigned char channel, unsigned char reg){
+    unsigned char result;
+    if( reg > 0x07 && reg < 0x0C)
+        ide_write(channel,ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
+    if( reg < 0x08) 
+        result = inb(channels[channel].base + reg - 0x00);
+    else if (reg < 0x0C)
+        result = inb(channels[channel].base  + reg - 0x06);
+     else if (reg < 0x0E)
+        result = inb(channels[channel].ctrl  + reg - 0x0A);
+    else if (reg < 0x16)
+        result = inb(channels[channel].bmide + reg - 0x0E);
+    if (reg > 0x07 && reg < 0x0C)
+        ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
+    return result;
+}
+
+void ide_read_buffer(unsigned char channel, unsigned char reg, unsigned int buffer, unsigned int quads){
+   if (reg > 0x07 && reg < 0x0C)
+      ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
+   if (reg < 0x08)
+      insl(channels[channel].base  + reg - 0x00, (void *)buffer, quads);
+   else if (reg < 0x0C)
+      insl(channels[channel].base  + reg - 0x06, (void *)buffer, quads);
+   else if (reg < 0x0E)
+      insl(channels[channel].ctrl  + reg - 0x0A, (void *)buffer, quads);
+   else if (reg < 0x16)
+      insl(channels[channel].bmide + reg - 0x0E, (void *)buffer, quads);
+   if (reg > 0x07 && reg < 0x0C)
+      ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
+}
+
+unsigned char ide_polling(unsigned char channel, unsigned int advanced_check) {
+ 
+   // (I) Delay 400 nanosecond for BSY to be set:
+   // -------------------------------------------------
+   for(int i = 0; i < 4; i++)
+      ide_read(channel, ATA_REG_ALTSTATUS); // Reading the Alternate Status port wastes 100ns; loop four times.
+ 
+   // (II) Wait for BSY to be cleared:
+   // -------------------------------------------------
+   while (ide_read(channel, ATA_REG_STATUS) & ATA_SR_BSY)
+      ; // Wait for BSY to be zero.
+ 
+   if (advanced_check) {
+      unsigned char state = ide_read(channel, ATA_REG_STATUS); // Read Status Register.
+ 
+      // (III) Check For Errors:
+      // -------------------------------------------------
+      if (state & ATA_SR_ERR)
+         return 2; // Error.
+ 
+      // (IV) Check If Device fault:
+      // -------------------------------------------------
+      if (state & ATA_SR_DF)
+         return 1; // Device Fault.
+ 
+      // (V) Check DRQ:
+      // -------------------------------------------------
+      // BSY = 0; DF = 0; ERR = 0 so we should check for DRQ now.
+      if ((state & ATA_SR_DRQ) == 0)
+         return 3; // DRQ should be set
+ 
+   }
+ 
+   return 0; // No Error.
+ 
+}
+
+unsigned char ide_print_error(unsigned int drive, unsigned char err) {
+   if (err == 0)
+      return err;
+ 
+   printf("IDE:");
+   if (err == 1) {printf("- Device Fault\n     "); err = 19;}
+   else if (err == 2) {
+      unsigned char st = ide_read(ide_devices[drive].Channel, ATA_REG_ERROR);
+      if (st & ATA_ER_AMNF)   {printf("- No Address Mark Found\n     ");   err = 7;}
+      if (st & ATA_ER_TK0NF)   {printf("- No Media or Media Error\n     ");   err = 3;}
+      if (st & ATA_ER_ABRT)   {printf("- Command Aborted\n     ");      err = 20;}
+      if (st & ATA_ER_MCR)   {printf("- No Media or Media Error\n     ");   err = 3;}
+      if (st & ATA_ER_IDNF)   {printf("- ID mark not Found\n     ");      err = 21;}
+      if (st & ATA_ER_MC)   {printf("- No Media or Media Error\n     ");   err = 3;}
+      if (st & ATA_ER_UNC)   {printf("- Uncorrectable Data Error\n     ");   err = 22;}
+      if (st & ATA_ER_BBK)   {printf("- Bad Sectors\n     ");       err = 13;}
+   } else  if (err == 3)           {printf("- Reads Nothing\n     "); err = 23;}
+     else  if (err == 4)  {printf("- Write Protected\n     "); err = 8;}
+   printf("- [%s %s] %s\n",
+      (const char *[]){"Primary", "Secondary"}[ide_devices[drive].Channel], // Use the channel as an index into the array
+      (const char *[]){"Master", "Slave"}[ide_devices[drive].Drive], // Same as above, using the drive
+      ide_devices[drive].Model);
+ 
+   return err;
+}
+
+
+inline void init_IDE( uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4)
+{
+   Detect_IO_Ports( BAR0,  BAR1, BAR2,  BAR3,  BAR4);
+
+   printf("ATA Primary port,  base: 0x%x, ctrl: 0x%x\n", channels[ATA_PRIMARY].base , channels[ATA_PRIMARY].ctrl);
+   printf("ATA Secondary port,  base: 0x%x, ctrl: 0x%x\n", channels[ATA_SECONDARY].base , channels[ATA_SECONDARY].ctrl);
+
+   // 2- Disable IRQs:
+    ide_write(ATA_PRIMARY  , ATA_REG_CONTROL, 2);
+    ide_write(ATA_SECONDARY, ATA_REG_CONTROL, 2);
+   
+   DetectDevices();
+ 
+   return;
+   // 4- Print Summary:
+   for (int i = 0; i < 4; i++)
+      if (ide_devices[i].Reserved == 1) {
+         printf(" Found %s Drive %d bytes - %x\n",
+            (const char *[]){"ATA", "ATAPI"}[ide_devices[i].Type],         /* Type */
+            ide_devices[i].Size  / 2,               /* Size */
+            ide_devices[i].Model);
+      }
+}
+
+
+// 3- Detect ATA-ATAPI Devices:
+inline void DetectDevices(){
+   int i, j, k, count = 0;
+
+   for (i = 0; i < 2; i++)
+      for (j = 0; j < 2; j++) {
+ 
+         unsigned char err = 0, type = IDE_ATA, status;
+         ide_devices[count].Reserved = 0; // Assuming that no drive here.
+ 
+         // (I) Select Drive:
+         ide_write(i, ATA_REG_HDDEVSEL, 0xA0 | (j << 4)); // Select Drive.
+         wait(1000); // Wait 1ms for drive select to work.
+ 
+         // (II) Send ATA Identify Command:
+         ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY);
+         wait(1000); 
+ 
+         // (III) Polling:
+         if (ide_read(i, ATA_REG_STATUS) == 0) continue; // If Status = 0, No Device.
+ 
+         while(1) {
+            status = ide_read(i, ATA_REG_STATUS);
+            if ((status & ATA_SR_ERR)) {err = 1; break;} // If Err, Device is not ATA.
+            if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRQ)) break; // Everything is right.
+         }
+ 
+         // (IV) Probe for ATAPI Devices:
+         if (err != 0) {
+            unsigned char cl = ide_read(i, ATA_REG_LBA1);
+            unsigned char ch = ide_read(i, ATA_REG_LBA2);
+ 
+            if (cl == 0x14 && ch ==0xEB)
+               type = IDE_ATAPI;
+            else if (cl == 0x69 && ch == 0x96)
+               type = IDE_ATAPI;
+            else
+               continue; // Unknown Type (may not be a device).
+ 
+            ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY_PACKET);
+            wait(1000);
+         }
+ 
+         // (V) Read Identification Space of the Device:
+         ide_read_buffer(i, ATA_REG_DATA, (unsigned int) ide_buf, 128);
+ 
+         // (VI) Read Device Parameters:
+         ide_devices[count].Reserved     = 1;
+         ide_devices[count].Type         = type;
+         ide_devices[count].Channel      = i;
+         ide_devices[count].Drive        = j;
+         ide_devices[count].Signature    = *((unsigned short *)(ide_buf + ATA_IDENT_DEVICETYPE));
+         ide_devices[count].Capabilities = *((unsigned short *)(ide_buf + ATA_IDENT_CAPABILITIES));
+         ide_devices[count].CommandSets  = *((unsigned int *)(ide_buf + ATA_IDENT_COMMANDSETS));
+ 
+         // (VII) Get Size:
+         if (ide_devices[count].CommandSets & (1 << 26))
+            // Device uses 48-Bit Addressing:
+            ide_devices[count].Size   = *((unsigned int *)(ide_buf + ATA_IDENT_MAX_LBA_EXT));
+         else
+            // Device uses CHS or 28-bit Addressing:
+            ide_devices[count].Size   = *((unsigned int *)(ide_buf + ATA_IDENT_MAX_LBA));
+ 
+         // (VIII) String indicates model of device (like Western Digital HDD and SONY DVD-RW...):
+         for(k = 0; k < 40; k += 2) {
+            ide_devices[count].Model[k] = ide_buf[ATA_IDENT_MODEL + k + 1];
+            ide_devices[count].Model[k + 1] = ide_buf[ATA_IDENT_MODEL + k];}
+         ide_devices[count].Model[40] = 0; // Terminate String.
+ 
+         count++;
+      }
+}
+
+
+inline void Detect_IO_Ports(uint32_t BAR0, uint32_t BAR1,uint32_t BAR2, uint32_t BAR3, uint32_t BAR4){
+    // 1 Detect I/O Ports which interface an IDE Controller
+
+   // Based on the implementation within serenity
+    channels[ATA_PRIMARY].base = (BAR0 == 0x1 || BAR0 == 0x0) ? 0x1F0 : BAR0 & (~1);
+    channels[ATA_PRIMARY  ].ctrl  = (BAR1 == 0x1 || BAR1 == 0x0) ?  0x3F6 : BAR1 & (~1);
+    channels[ATA_SECONDARY].base  = (BAR2 == 0x1 || BAR2 == 0x0) ? 0x170 : BAR2 & (~1);
+    channels[ATA_SECONDARY].ctrl  = (BAR3 == 0x1 || BAR3 == 0x0) ? 0x376 : BAR3 & (~1);
+    channels[ATA_PRIMARY  ].bmide = (BAR4 & (~1)) + 0; // Bus Master IDE
+    channels[ATA_SECONDARY].bmide = (BAR4 & (~1)) + 8; // Bus Master IDE
+
+}
--- a/kernel/drivers/io/io.cpp
+++ b/kernel/drivers/io/io.cpp
@ -0,0 +1,76 @@
+#include "io.h"
+
+unsigned char inb_p(unsigned short ){
+        // TODO: implement me!
+        return 0;
+}
+unsigned short inw(unsigned short ){
+// TODO: implement me!
+        return 0;
+}
+unsigned short inw_p(unsigned short ){
+// TODO: implement me!
+        return 0;
+}
+uint32_t inl( int port  ){
+        unsigned int data;
+        asm volatile ("inl %w1, %0": "=a" (data): "d" (port));
+        return data;
+}
+unsigned int inl_p(unsigned short ){
+// TODO: implement me!
+        return 0;
+}
+
+
+void b_p(unsigned char , unsigned short ){
+
+}
+void outw(unsigned short , unsigned short ){
+
+}
+void outw_p(unsigned short , unsigned short ){
+
+}
+
+void outl( int port , uint32_t data ){
+        asm volatile ("outl %0, %1" :: "a" (data), "dn"(port));
+}
+
+
+void outl_p(unsigned int , unsigned short ){
+
+}
+
+void insb(unsigned short , void *,
+        unsigned long ){
+
+        }
+void insw(unsigned short , void *,
+        unsigned long ){
+
+        }
+void insl(unsigned short , void *,
+        unsigned long ){
+
+        }
+void outsb(unsigned short , const void *,
+        unsigned long ){
+
+        }
+void outsw(unsigned short , const void *,
+        unsigned long ){
+
+        }
+void outsl(unsigned short , const void *,
+        unsigned long ){
+
+        }
+
+void io_wait(void)
+{
+    /* TODO: This is probably fragile. */
+    asm volatile ( "jmp 1f\n\t"
+                   "1:jmp 2f\n\t"
+                   "2:" );
+}
--- a/kernel/drivers/io/io.h
+++ b/kernel/drivers/io/io.h
@ -0,0 +1,40 @@
+#pragma once
+#include <stdint.h>
+
+static inline uint8_t inb(uint16_t port)
+{
+    uint8_t ret;
+    asm volatile ( "inb %1, %0"
+                   : "=a"(ret)
+                   : "Nd"(port) );
+    return ret;
+}
+unsigned char inb_p(unsigned short port);
+unsigned short inw(unsigned short port);
+unsigned short inw_p(unsigned short port);
+uint32_t inl( int port  );
+unsigned int inl_p(unsigned short port);
+
+static inline void outb(uint16_t port, uint8_t val)
+{
+    asm volatile ( "outb %0, %1" : : "a"(val), "Nd"(port) );
+}
+void outb_p(unsigned char value, unsigned short port);
+void outw(unsigned short value, unsigned short port);
+void outw_p(unsigned short value, unsigned short port);
+void outl( int port , uint32_t data );
+void outl_p(unsigned int value, unsigned short port);
+
+void insb(unsigned short port, void *addr,
+        unsigned long count);
+void insw(unsigned short port, void *addr,
+        unsigned long count);
+void insl(unsigned short port, void *addr,
+        unsigned long count);
+void outsb(unsigned short port, const void *addr,
+        unsigned long count);
+void outsw(unsigned short port, const void *addr,
+        unsigned long count);
+void outsl(unsigned short port, const void *addr,
+        unsigned long count);
+void io_wait();
--- a/kernel/drivers/pci/pci.cpp
+++ b/kernel/drivers/pci/pci.cpp
@ -0,0 +1,164 @@
+#include "pci.h"
+
+void PCI::Scan(){
+     
+        int devicesFound = 0;
+
+        printf("Start finding devices, Found: %d devices");
+        // loop through all possible busses, devices and their functions;
+        for( int bus = 0 ; bus < 256 ; bus++)
+        {
+            
+            for(int device = 0; device < 32 ; device ++)
+            {
+                int function = 0;
+
+                uint64_t DeviceIdentify = PCI::ConfigReadWord(bus, device, function,0x0);
+                uint32_t DeviceID = GetDevice(bus, device, function) >> 16;
+
+                if( DeviceID != 0xFFFF){
+                    PCIBusAddress busAddress =
+                    PCIBusAddress{bus, device, function };
+
+                    PrintPCIDevice(busAddress);
+
+                    // iterate over the functions if it is a multi function device!
+                    if( PCI::IsMultiFunctionDevice(busAddress) ){
+                        printf("Multi function device! \n");
+                        printf("Check remaining Functions\n");
+                        for ( function = 1  ; function < 8; function++)
+                        {
+                            uint32_t DeviceID = GetDevice(bus, device, function) >> 16;
+
+                            if( DeviceID != 0xFFFF){
+                                PCIBusAddress busAddress2 = PCIBusAddress{bus, device, function};
+                                PrintPCIDevice(busAddress2);
+                                devicesFound++;
+                            }
+                        }
+                    
+                    }
+
+                    
+                    devicesFound++;            
+                }
+            }
+            
+        }
+
+        printf("Found %d PCI devices!\n", devicesFound);
+}
+
+const char* PCI::getClassName (uint8_t ClassCode){
+    bool isKnown = (ClassCode < PCI::KnownClassCodes);
+    return  isKnown ? PCI::ClassCodeNames[ClassCode].name : "Unknown ClassCode";
+}
+
+const char* PCI::getVendor( uint32_t VendorID){
+    switch (VendorID)
+    {
+        case 0x8086:
+            return "Intel Corporation";
+            break;
+
+        case 0x10DE:
+            return "NVIDIA Corporation";
+            break;
+
+        case 0x1022:
+            return "Advanced Micro Devices, Inc.[AMD]";
+            break;
+
+        case 0x1002:
+            return "Advanced Micor Devices, Inc.[AMD/ATI]";
+            break;
+
+        case 0xbeef:
+            return "VirtualBox Graphics Adapter";
+            break;
+
+        case 0xcafe:
+            return "VirtualBox Guest Service";
+            break;
+
+        default:
+            return "Vendor Unkown";
+            break;
+    }
+
+}
+
+uint64_t PCI::GetDevice (int bus, int device, int function ){
+    return PCI::ConfigReadWord(bus, device, function,0x0);
+}
+
+bool PCI::IsMultiFunctionDevice(PCIBusAddress& PCIDeviceAddress)
+{
+    uint32_t header_information = ConfigReadWord(PCIDeviceAddress, 0xC);
+    return (((header_information>>16)
+             & 0x80)
+            >> 7  );
+}
+
+uint16_t PCI::GetClassCodes( PCIBusAddress& PCIDeviceAddress ){
+    return (uint16_t)(ConfigReadWord(PCIDeviceAddress, 0x8) >> 16);
+}
+
+uint8_t PCI::GetHeaderType( PCIBusAddress& PCIDeviceAddress ){
+    uint32_t header_information = ConfigReadWord(PCIDeviceAddress , 0xC);
+    return (uint8_t) (
+            ((header_information >> 16) //Get higher half
+             & 0x00FF) // Select the last two bytes
+            & 0x7F ); // Mask bit 7 as it indicates if the device is a mulit function device!
+}
+
+uint32_t PCI::ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offset){
+    uint32_t address;
+
+    address = (uint32_t) (
+            ((uint32_t) 1 << PCI_ENABLE_ADDR_SHIFT) |
+            ((uint32_t)bus << PCI_BUS_ADDR_SHIFT) |
+            ((uint32_t)device << PCI_DEVICE_ADDR_SHIFT) |
+            ((uint32_t)func << PCI_FUNCTION_ADDR_SHIFT) |
+            offset );
+
+    outl(CONFIG_ADDRESS, address);
+
+
+    return inl(CONFIG_DATA);
+}
+
+uint8_t PCI::GetProgIF (PCIBusAddress& PCIDeviceAddress){
+    uint32_t data = ConfigReadWord(PCIDeviceAddress, 0x8);
+    return ((data >> 8) & 0xFF);
+}
+
+uint32_t PCI::ConfigReadWord ( PCIBusAddress& PCIDeviceAddress , uint8_t offset){
+    outl(CONFIG_ADDRESS , PCIDeviceAddress.getAddress() | offset );
+    return inl(CONFIG_DATA);
+}
+
+
+uint32_t PCI::ReadBAR ( PCIBusAddress& PCIDeviceAddress, int bar_number){
+    int offsetToBar = 0x10 + (bar_number* 0x4);
+    return ConfigReadWord(PCIDeviceAddress, offsetToBar);
+}
+
+void PCI::PrintPCIDevice (PCIBusAddress& PCIDeviceAddress)
+{
+    uint32_t DeviceID =  (PCI::GetDevice(PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function) >> 16);
+    uint32_t VendorID  = PCI::GetDevice(PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function) & 0xFFFF;
+    printf("Device found!\n");
+    printf("Bus: %d, Device: %d, function: %d \n", PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function);
+    printf("DeviceID: 0x%x, Vendor: %s\n",
+           DeviceID
+            , PCI::getVendor(VendorID)  );
+
+    uint8_t header_type = PCI::GetHeaderType(PCIDeviceAddress);
+    printf( "Header type: 0x%x\n", header_type);
+
+    uint16_t deviceClasses = PCI::GetClassCodes(PCIDeviceAddress);
+
+    printf("class: %s, subClass: %d\n\n", PCI::getClassName((deviceClasses >> 8)), deviceClasses & 0xFF);
+
+}
--- a/kernel/drivers/pci/pci.h
+++ b/kernel/drivers/pci/pci.h
@ -0,0 +1,61 @@
+#pragma once
+#include <stdint.h>
+#include "../io/io.h"
+#include "../../terminal/kterm.h"
+#include "pciDevice.h"
+
+// Configuration Space Access Mechanism #1
+#define CONFIG_ADDRESS 0xCF8 // Configuration adress that is to be accessed
+#define CONFIG_DATA 0xCFC // Will do the actual configuration operation
+#define PCI_BUS_ADDR_SHIFT 16
+#define PCI_DEVICE_ADDR_SHIFT  11
+#define PCI_FUNCTION_ADDR_SHIFT 8
+#define PCI_ENABLE_ADDR_SHIFT 31
+
+class PCI  {
+public:
+    static void Scan();
+    static uint32_t ConfigReadWord ( PCIBusAddress& PCIDeviceAddress , uint8_t offset);
+    static uint8_t GetProgIF (PCIBusAddress& PCIDeviceAddress);
+    static uint32_t ReadBAR ( PCIBusAddress& PCIDeviceAddress, int bar_number);
+    static uint32_t ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offset);
+    static uint8_t GetHeaderType( PCIBusAddress& PCIDeviceAddress );
+    static uint16_t GetClassCodes( PCIBusAddress& PCIDeviceAddress );
+    static bool IsMultiFunctionDevice(PCIBusAddress& PCIDeviceAddress);
+    static uint64_t GetDevice (int bus, int device, int function );
+
+
+    static const char* getClassName (uint8_t ClassCode);
+    static const char* getVendor( uint32_t VendorID);
+    static void PrintPCIDevice(PCIBusAddress& PCIDevice);
+
+private:
+    struct ClassCode {
+        const char* name;
+        uint8_t code;
+    };
+    static constexpr ClassCode ClassCodeNames []= {
+            {"Unclassified", 0x0},
+            {"MassStorage Controller", 0x1},
+            {"Network Controller", 0x2},
+            {"Display Controller", 0x3},
+            {"Multimedia Controller", 0x4},
+            {"Memory Controller", 0x5},
+            {"Bridge", 0x6},
+            {"Simple Communication Controller", 0x7},
+            {"Base System Peripheral", 0x8},
+            {"Input Device Controller", 0x9},
+            {"Docking Station", 0xA},
+            {"Processor", 0xB},
+            {"Serial Bus Controller", 0xC},
+            { "Wireless Controller", 0xD},
+            {"Intelligent Controller", 0xE},
+            {"Satellite Communication Controller", 0xF},
+            {"Encryption Controller", 0x10},
+            {"Signal Processing Controller", 0x11},
+            { "Processing Accelerator", 0x12},
+            { "Non-Essential Instrumentation", 0x13}
+    };
+    static const uint8_t KnownClassCodes = sizeof(ClassCodeNames) / sizeof(ClassCode);
+};
+
--- a/kernel/drivers/pci/pciDevice.cpp
+++ b/kernel/drivers/pci/pciDevice.cpp
@ -0,0 +1,7 @@
+ #include "pciDevice.h"
+
+// NOTE: we would really like to return a pointer 
+// to the newly created PCIBusAddress struct; 
+ PCIBusAddress const PCIDevice::PCIAddress(){
+     return PCIBusAddress{bus ,device, function};
+ }
--- a/kernel/drivers/pci/pciDevice.h
+++ b/kernel/drivers/pci/pciDevice.h
@ -0,0 +1,54 @@
+#pragma once 
+#include <stdint.h>
+/*
+* PCI devices API 
+*/
+struct PCIBusAddress{
+
+    int bus ;
+    int device ;
+    int function;
+
+
+    uint32_t getAddress( ){
+        return ((uint32_t) 1 << 31) |
+                ((uint32_t) bus << 16) |
+                ((uint32_t) device << 11)|
+                ((uint32_t) function << 8) |
+                0x0000;
+
+    };
+};
+
+class PCIDevice {
+    public : 
+         PCIDevice (PCIBusAddress* , int );
+         ~PCIDevice();
+         PCIBusAddress const PCIAddress();
+
+
+         inline const char* getDeviceString(){
+             return "Not implemented";  //GetClassCodeName(deviceclass);
+         }
+
+        inline const char* getVendorString(){
+            return "Not implemented"; // getVendor(VendorID);
+        }
+
+        inline void setVendorID (uint16_t id) {
+            this->VendorID = id;
+        }
+
+    private:
+        int bus;
+        int device;
+        int function;
+
+        uint16_t VendorID;
+        uint16_t DeviceID;
+        uint8_t deviceclass;
+        uint8_t devicesubclass;
+
+        int headerType;
+
+};
--- a/kernel/drivers/pic/pic.cpp
+++ b/kernel/drivers/pic/pic.cpp
@ -0,0 +1,62 @@
+#include "pic.h"
+
+extern "C" void PIC_sendEOI (unsigned char irq){
+    if(irq >= 8)
+        outb(PIC2_COMMAND, PIC_EOI);
+    outb(PIC1_COMMAND, PIC_EOI);
+}
+
+/* Helper func */
+static uint16_t __pic_get_irq_reg(int ocw3)
+{
+    /* OCW3 to PIC CMD to get the register values.  PIC2 is chained, and
+     * represents IRQs 8-15.  PIC1 is IRQs 0-7, with 2 being the chain */
+    outb(PIC1_COMMAND, ocw3);
+    outb(PIC2_COMMAND, ocw3);
+    return (inb(PIC2_COMMAND) << 8) | inb(PIC1_COMMAND);
+}
+ 
+/* Returns the combined value of the cascaded PICs irq request register */
+uint16_t pic_get_irr(void)
+{
+    return __pic_get_irq_reg(PIC_READ_IRR);
+}
+ 
+/* Returns the combined value of the cascaded PICs in-service register */
+uint16_t pic_get_isr(void)
+{
+    return __pic_get_irq_reg(PIC_READ_ISR);
+}
+
+
+void PIC_remap (int offset1, int offset2 ){
+    unsigned char a1, a2;
+
+    a1 = inb(PIC1_DATA);
+    a2 = inb(PIC2_DATA);
+
+
+    // Start initialization
+
+    outb(PIC1_COMMAND, ICW1_INIT | ICW1_ICW4);
+    io_wait();
+    outb(PIC2_COMMAND, ICW1_INIT | ICW1_ICW4);
+    io_wait();
+    outb(PIC1_DATA, offset1);
+    io_wait();
+    outb(PIC2_DATA, offset2);
+    io_wait();
+    outb(PIC1_DATA, 4);
+    io_wait();
+    outb(PIC2_DATA, 2);
+    io_wait();
+
+    outb(PIC1_DATA, ICW4_8086);
+    io_wait();
+    outb(PIC2_DATA, ICW4_8086);
+    io_wait();
+
+    outb(PIC1_DATA, a1);
+    outb(PIC2_DATA, a2);
+
+}
--- a/kernel/drivers/pic/pic.h
+++ b/kernel/drivers/pic/pic.h
@ -0,0 +1,57 @@
+#pragma once 
+#include "../io/io.h"
+
+#define PIC1		0x20		/* IO base address for master PIC */
+#define PIC2		0xA0		/* IO base address for slave PIC */
+#define PIC1_COMMAND	PIC1
+#define PIC1_DATA	(PIC1+1)
+#define PIC2_COMMAND	PIC2
+#define PIC2_DATA	(PIC2+1)
+
+
+#define ICW1_ICW4	0x01		/* ICW4 (not) needed */
+#define ICW1_SINGLE	0x02		/* Single (cascade) mode */
+#define ICW1_INTERVAL4	0x04		/* Call address interval 4 (8) */
+#define ICW1_LEVEL	0x08		/* Level triggered (edge) mode */
+#define ICW1_INIT	0x10		/* Initialization - required! */
+ 
+#define ICW4_8086	0x01		/* 8086/88 (MCS-80/85) mode */
+#define ICW4_AUTO	0x02		/* Auto (normal) EOI */
+#define ICW4_BUF_SLAVE	0x08		/* Buffered mode/slave */
+#define ICW4_BUF_MASTER	0x0C		/* Buffered mode/master */
+#define ICW4_SFNM	0x10		/* Special fully nested (not) */
+
+#define PIC_EOI 0x20
+#define PIC_READ_IRR 0x0a    /* OCW3 irq ready next CMD read */
+#define PIC_READ_ISR 0x0b    /* OCW3 irq service next CMD read */
+
+extern "C"{
+
+extern void irq0 ();
+extern void irq1 ();
+extern void irq2 ();
+extern void irq3 ();
+extern void irq4 ();
+extern void irq5 ();
+extern void irq6 ();
+extern void irq7 ();
+extern void irq8 ();
+extern void irq9 ();
+extern void irq10 ();
+extern void irq11 ();
+extern void irq12 ();
+extern void irq13 ();
+extern void irq14 ();
+extern void irq15 ();
+
+void PIC_sendEOI (unsigned char irq);
+
+}
+
+
+//static uint16_t __pic_get_irq_reg(int ocw3);
+uint16_t pic_get_irr(void);
+uint16_t pic_get_isr(void);
+
+
+void PIC_remap (int offset1, int offset2 );
--- a/kernel/drivers/pit/pit.cpp
+++ b/kernel/drivers/pit/pit.cpp
@ -0,0 +1,54 @@
+#include "pit.h"
+#include "../../terminal/kterm.h"
+uint32_t pit_tick = 0;
+
+
+void pit_initialise()
+{
+    asm volatile("CLI");
+
+#ifdef __VERBOSE__
+    printf("Init PIT!\n");
+#endif
+    // clear mask for IRQ 0 
+    uint8_t value = inb(0x21) & ~(1<< 0);
+    outb(0x21, value);
+
+    io_wait();
+
+    const int freq = 500;
+
+    uint32_t divisor = 1193180 / freq;
+
+    outb(PIT_COMMAND, 0x36);
+
+    uint8_t l = (uint8_t) (divisor & 0xFF);
+    uint8_t h = (uint8_t) ( (divisor>>8) & 0xff);
+
+    outb(PIT_DATA_0, l);
+    outb(PIT_DATA_0,h);
+
+
+    asm volatile("STI");
+}
+
+
+void get_pit_count()
+{
+    asm volatile ("CLI");
+
+    outb(PIT_COMMAND, 0);
+    uint16_t count = inb(PIT_DATA_0);
+    count |= inb(PIT_DATA_0) << 8;
+
+    printf("PIT count: 0x%x\n", count); 
+
+    asm volatile("STI");   
+
+}
+
+void set_pit_count()
+{
+
+}
+
--- a/kernel/drivers/pit/pit.h
+++ b/kernel/drivers/pit/pit.h
@ -0,0 +1,18 @@
+#pragma once 
+#include <stdint.h>
+#include "../io/io.h"
+#define PIT_DATA_0 0x40
+#define PIT_DATA_1 0x41
+#define PIT_DATA_2 0x42
+#define PIT_COMMAND 0x43
+
+
+extern uint32_t pit_tick;
+
+
+void pit_initialise();
+
+
+void get_pit_count();
+
+void set_pit_count();
--- a/kernel/drivers/ps-2/keyboard.cpp
+++ b/kernel/drivers/ps-2/keyboard.cpp
@ -0,0 +1,51 @@
+#include "keyboard.h"
+
+KeyPressInfo keyPress {};
+
+void KeyHandled(){
+    keyPress.ScanCode= 0x00;
+    keyPress.PressedModifiers = 0x00;
+}
+
+
+char getASCIIKey(){
+    char keyPressed;
+    // Wait until a key is pressed  
+    while(keyPress.ScanCode == 0x00) {
+        asm volatile ("NOP");
+    }
+
+    
+    // Translate keycode to ascii 
+    // Probably a lookup table might be handy 
+    // Until 0x37
+     const char* ASCIILookUp =
+      "\01234567890-=\0\0QWERTYUIOP[]\0\0ASDFGHJKL;\'`\0\\ZXCVBNM,./\0"; 
+     
+     uint8_t ASCII_Index = keyPress.ScanCode - 3  ;
+     //printf("ASCII_INDEX: %x\n", ASCII_Index);
+     keyPressed = ASCIILookUp[ASCII_Index];
+
+    KeyHandled();
+
+    return keyPressed;
+}
+
+
+
+uint8_t getKey(){
+    // Wait until a key is pressed 
+    while(keyPress.ScanCode == 0x00){
+        asm volatile ("NOP");
+    }
+    
+    if( keyPress.ScanCode > 0x37){
+        keyPress.ScanCode = 0x00;
+        return 0;
+    }
+
+    uint8_t ScanCode = keyPress.ScanCode;
+   // KeyHandled();
+
+    return  ScanCode ;
+}
--- a/kernel/drivers/ps-2/keyboard.h
+++ b/kernel/drivers/ps-2/keyboard.h
@ -0,0 +1,34 @@
+#pragma once
+#include <stdint.h>
+#include "../../terminal/kterm.h"
+enum ScanCodeSet {
+    None            =   0,
+    ScanCodeSet1    =   1,
+    ScanCodeSet2    =   2,
+    ScanCodeSet3    =   3,
+};
+
+enum Modifiers {
+    LSHIFT  =   1,
+    RSHIFT  =   2,
+
+    LCTRL   =   3,
+    RCTRL   =   4,
+
+    LALT    =   5,
+    RALT    =   6
+};
+
+struct KeyPressInfo{ 
+    uint8_t PressedModifiers;
+    uint8_t ScanCode;
+};
+
+
+
+extern KeyPressInfo keyPress;
+
+void KeyHandled();
+
+char getASCIIKey();
+uint8_t getKey();
--- a/kernel/drivers/ps-2/scancodes/set1.h
+++ b/kernel/drivers/ps-2/scancodes/set1.h
@ -0,0 +1,184 @@
+#pragma once 
+
+
+
+
+
+
+// ScanCode set 1 
+int ScanCodeToKeyCode [0xD8];
+
+/* key pressed scancode */ 
+ScanCodeToKeyCode[0x01] = 4017;   // escape pressed
+ScanCodeToKeyCode[0x02] = 4018;   // 1 pressed
+ScanCodeToKeyCode[0x03] = 4019;   // 2 pressed
+ScanCodeToKeyCode[0x04] = 4020;   // 3 pressed
+ScanCodeToKeyCode[0x05] =""   // 4 pressed	
+ScanCodeToKeyCode[0x06] =""   // 5 pressed
+ScanCodeToKeyCode[0x07] =""   // 6 pressed
+ScanCodeToKeyCode[0x08] =""   // 7 pressed
+ScanCodeToKeyCode[0x09] =""   // 8 pressed	
+ScanCodeToKeyCode[0x0A] =""   // 9 pressed	
+ScanCodeToKeyCode[0x0B] =""   // 0 (zero) pressed
+ScanCodeToKeyCode[0x0C] =""   // - pressed
+ScanCodeToKeyCode[0x0D] =""   // = pressed	
+ScanCodeToKeyCode[0x0E] =""   // backspace pressed
+ScanCodeToKeyCode[0x0F] =""   // tab pressed
+ScanCodeToKeyCode[0x10] =""  	// Q pressed
+ScanCodeToKeyCode[0x11] =""   // W pressed	
+ScanCodeToKeyCode[0x12] ="" 	// E pressed
+ScanCodeToKeyCode[0x13] ="" 	// R pressed
+ScanCodeToKeyCode[0x14] ="" 	// T pressed
+ScanCodeToKeyCode[0x15] ="" 	// Y pressed	
+ScanCodeToKeyCode[0x16] ="" 	// U pressed
+ScanCodeToKeyCode[0x17] ="" 	// I pressed
+ScanCodeToKeyCode[0x18] ="" 	// O pressed
+ScanCodeToKeyCode[0x19] ="" 	// P pressed	
+ScanCodeToKeyCode[0x1A] =""   // [ pressed
+ScanCodeToKeyCode[0x1B] =""   // ] pressed
+ScanCodeToKeyCode[0x1C] =""   // enter pressed
+ScanCodeToKeyCode[0x1D] =""   // left control pressed
+ScanCodeToKeyCode[0x1E] ="" 	// A pressed
+ScanCodeToKeyCode[0x1F] ="" 	// S pressed
+ScanCodeToKeyCode[0x20] ="" 	// D pressed
+ScanCodeToKeyCode[0x21] ="" 	// F pressed
+ScanCodeToKeyCode[0x22] ="" 	// G pressed
+ScanCodeToKeyCode[0x23] ="" 	// H pressed
+ScanCodeToKeyCode[0x24] ="" 	// J pressed
+ScanCodeToKeyCode[0x25] ="" 	// K pressed
+ScanCodeToKeyCode[0x26] ="" 	// L pressed
+ScanCodeToKeyCode[0x27] =""   //  ; pressed
+ScanCodeToKeyCode[0x28] =""   // ' (single quote) pressed
+ScanCodeToKeyCode[0x29] =""   // ` (back tick) pressed
+ScanCodeToKeyCode[0x2A] =""   // left shift pressed	
+ScanCodeToKeyCode[0x2B] =""   // \ pressed
+ScanCodeToKeyCode[0x2C] ="" 	// Z pressed
+ScanCodeToKeyCode[0x2D] ="" 	// X pressed
+ScanCodeToKeyCode[0x2E] ="" 	// C pressed	
+ScanCodeToKeyCode[0x2F] ="" 	// V pressed
+ScanCodeToKeyCode[0x30] ="" 	// B pressed
+ScanCodeToKeyCode[0x31] ="" 	// N pressed
+ScanCodeToKeyCode[0x32] ="" 	// M pressed
+ScanCodeToKeyCode[0x33] =""   // , pressed
+ScanCodeToKeyCode[0x34] =""   // . pressed
+ScanCodeToKeyCode[0x35] =""   // / pressed
+ScanCodeToKeyCode[0x36] =""   // right shift pressed
+ScanCodeToKeyCode[0x37] =""   // (keypad) * pressed
+ScanCodeToKeyCode[0x38] =""   // left alt pressed	
+ScanCodeToKeyCode[0x39] =""   // space pressed	
+ScanCodeToKeyCode[0x3A] =""   // CapsLock pressed
+ScanCodeToKeyCode[0x3B] =""   // F1 pressed
+ScanCodeToKeyCode[0x3C] =""   // F2 pressed
+ScanCodeToKeyCode[0x3D] =""   // F3 pressed
+ScanCodeToKeyCode[0x3E] ="" 	// F4 pressed
+ScanCodeToKeyCode[0x3F] ="" 	// F5 pressed
+ScanCodeToKeyCode[0x40] ="" 	// F6 pressed
+ScanCodeToKeyCode[0x41] ="" 	// F7 pressed
+ScanCodeToKeyCode[0x42] ="" 	// F8 pressed
+ScanCodeToKeyCode[0x43] ="" 	// F9 pressed
+ScanCodeToKeyCode[0x44] ="" 	// F10 pressed
+ScanCodeToKeyCode[0x45] ="" 	// NumberLock pressed
+ScanCodeToKeyCode[0x46] ="" 	// ScrollLock pressed
+ScanCodeToKeyCode[0x47] ="" 	// (keypad) 7 pressed
+ScanCodeToKeyCode[0x48] ="" 	// (keypad) 8 pressed
+ScanCodeToKeyCode[0x49] ="" 	// (keypad) 9 pressed
+ScanCodeToKeyCode[0x4A] ="" 	// (keypad) - pressed
+ScanCodeToKeyCode[0x4B] ="" 	// (keypad) 4 pressed
+ScanCodeToKeyCode[0x4C] ="" 	// (keypad) 5 pressed
+ScanCodeToKeyCode[0x4D] ="" 	// (keypad) 6 pressed
+ScanCodeToKeyCode[0x4E] ="" 	// (keypad) + pressed
+ScanCodeToKeyCode[0x4F] ="" 	// (keypad) 1 pressed
+ScanCodeToKeyCode[0x50] ="" 	// (keypad) 2 pressed
+ScanCodeToKeyCode[0x51] ="" 	// (keypad) 3 pressed
+ScanCodeToKeyCode[0x52] ="" 	// (keypad) 0 pressed
+ScanCodeToKeyCode[0x53] ="" 	// (keypad) . pressed
+ScanCodeToKeyCode[0x57] ="" 	// F11 pressed
+ScanCodeToKeyCode[0x58] ="" 	// F12 pressed						
+
+
+/* key released scanCode.""*/
+ScanCodeToKeyCode[0x81] ="" 	// escape released
+ScanCodeToKeyCode[0x82] ="" 	// 1 released
+ScanCodeToKeyCode[0x83] ="" 	// 2 released
+ScanCodeToKeyCode[0x84] ="" 	// 3 released
+ScanCodeToKeyCode[0x85] ="" 	// 4 released
+ScanCodeToKeyCode[0x86] ="" 	// 5 released
+ScanCodeToKeyCode[0x87] ="" 	// 6 released
+ScanCodeToKeyCode[0x88] ="" 	// 7 released
+ScanCodeToKeyCode[0x89] ="" 	// 8 released
+ScanCodeToKeyCode[0x8A] ="" 	// 9 released
+ScanCodeToKeyCode[0x8B] ="" 	// 0 (zero) released
+ScanCodeToKeyCode[0x8C] ="" 	// - released
+ScanCodeToKeyCode[0x8D] ="" 	// = released
+ScanCodeToKeyCode[0x8E] ="" 	// backspace released
+ScanCodeToKeyCode[0x8F] ="" 	// tab released
+ScanCodeToKeyCode[0x90] ="" 	// Q released
+ScanCodeToKeyCode[0x91] ="" 	// W released
+ScanCodeToKeyCode[0x92] ="" 	// E released
+ScanCodeToKeyCode[0x93] ="" 	// R released
+ScanCodeToKeyCode[0x94] ="" 	// T released
+ScanCodeToKeyCode[0x95] ="" 	// Y released	
+ScanCodeToKeyCode[0x96] ="" 	// U released
+ScanCodeToKeyCode[0x97] ="" 	// I released
+ScanCodeToKeyCode[0x98] ="" 	// O released	
+ScanCodeToKeyCode[0x99] ="" 	// P released
+ScanCodeToKeyCode[0x9A] ="" 	// [ released	
+ScanCodeToKeyCode[0x9B] ="" 	// ] released
+ScanCodeToKeyCode[0x9C] ="" 	// enter released
+ScanCodeToKeyCode[0x9D] ="" 	// left control released
+ScanCodeToKeyCode[0x9E] ="" 	// A released
+ScanCodeToKeyCode[0x9F] ="" 	// S released
+ScanCodeToKeyCode[0xA0] ="" 	// D released
+ScanCodeToKeyCode[0xA1] ="" 	// F released
+ScanCodeToKeyCode[0xA2] ="" 	// G released
+ScanCodeToKeyCode[0xA3] ="" 	// H released
+ScanCodeToKeyCode[0xA4] ="" 	// J released
+ScanCodeToKeyCode[0xA5] ="" 	// K released
+ScanCodeToKeyCode[0xA6] ="" 	// L released
+ScanCodeToKeyCode[0xA7] ="" 	//  ; released
+ScanCodeToKeyCode[0xA8] ="" 	// ' (single quote) released
+ScanCodeToKeyCode[0xA9] ="" 	// ` (back tick) released
+ScanCodeToKeyCode[0xAA] ="" 	// left shift released
+ScanCodeToKeyCode[0xAB] ="" 	// \ released
+ScanCodeToKeyCode[0xAC] ="" 	// Z released	
+ScanCodeToKeyCode[0xAD] ="" 	// X released	
+ScanCodeToKeyCode[0xAE] ="" 	// C released	
+ScanCodeToKeyCode[0xAF] ="" 	// V released
+ScanCodeToKeyCode[0xB0] ="" 	// B released	
+ScanCodeToKeyCode[0xB1] ="" 	// N released	
+ScanCodeToKeyCode[0xB2] ="" 	// M released	
+ScanCodeToKeyCode[0xB3] ="" 	// , released
+ScanCodeToKeyCode[0xB4] ="" 	// . released	
+ScanCodeToKeyCode[0xB5] ="" 	// / released	
+ScanCodeToKeyCode[0xB6] ="" 	// right shift released
+ScanCodeToKeyCode[0xB7] ="" 	// (keypad) * released
+ScanCodeToKeyCode[0xB8] ="" 	// left alt released	
+ScanCodeToKeyCode[0xB9] ="" 	// space released	
+ScanCodeToKeyCode[0xBA] ="" 	// CapsLock released	
+ScanCodeToKeyCode[0xBB] ="" 	// F1 released
+ScanCodeToKeyCode[0xBC] ="" 	// F2 released	
+ScanCodeToKeyCode[0xBD] ="" 	// F3 released	
+ScanCodeToKeyCode[0xBE] ="" 	// F4 released	
+ScanCodeToKeyCode[0xBF] ="" 	// F5 released
+ScanCodeToKeyCode[0xC0] ="" 	// F6 released	
+ScanCodeToKeyCode[0xC1] ="" 	// F7 released	
+ScanCodeToKeyCode[0xC2] ="" 	// F8 released	
+ScanCodeToKeyCode[0xC3] ="" 	// F9 released
+ScanCodeToKeyCode[0xC4] ="" 	// F10 released
+ScanCodeToKeyCode[0xC5] ="" 	// NumberLock released
+ScanCodeToKeyCode[0xC6] ="" 	// ScrollLock released
+ScanCodeToKeyCode[0xC7] ="" 	// (keypad) 7 released
+ScanCodeToKeyCode[0xC8] ="" 	// (keypad) 8 released	
+ScanCodeToKeyCode[0xC9] ="" 	// (keypad) 9 released	
+ScanCodeToKeyCode[0xCA] ="" 	// (keypad) - released	
+ScanCodeToKeyCode[0xCB] ="" 	// (keypad) 4 released
+ScanCodeToKeyCode[0xCC] ="" 	// (keypad) 5 released	
+ScanCodeToKeyCode[0xCD] ="" 	// (keypad) 6 released	
+ScanCodeToKeyCode[0xCE] ="" 	// (keypad) + released	
+ScanCodeToKeyCode[0xCF] ="" 	// (keypad) 1 released
+ScanCodeToKeyCode[0xD0] ="" 	// (keypad) 2 released	
+ScanCodeToKeyCode[0xD1] ="" 	// (keypad) 3 released	
+ScanCodeToKeyCode[0xD2] ="" 	// (keypad) 0 released	
+ScanCodeToKeyCode[0xD3] ="" 	// (keypad) . released
+ScanCodeToKeyCode[0xD7] ="" 	// F11 released
+ScanCodeToKeyCode[0xD8] ="" 	// F12 released					
--- a/kernel/drivers/serial/serial.cpp
+++ b/kernel/drivers/serial/serial.cpp
@ -0,0 +1,19 @@
+#include "serial.h"
+
+Serial Serial::init() {
+    // No clue what to setup yet!
+
+    return Serial();
+}
+
+void Serial::print(){
+    // Do nothing!
+}
+
+Serial::Serial(){
+    // Do nothing!
+}
+
+Serial::~Serial(){
+    // Do nothing!
+}
--- a/kernel/drivers/serial/serial.h
+++ b/kernel/drivers/serial/serial.h
@ -0,0 +1,19 @@
+#pragma once
+
+class Serial {
+
+    public: 
+        static Serial init();
+        
+        void print();
+
+    private: 
+        const int COM1 = 0x3F8;
+        const int COM2 = 0x2F8;
+        const int COM3 = 0x3E8;
+        const int COM4 = 0x2E8;
+
+
+        Serial();
+        ~Serial();
+};
--- a/kernel/drivers/vga/VBE.h
+++ b/kernel/drivers/vga/VBE.h
@ -0,0 +1,41 @@
+
+#define VBE_DISPI_IOPORT_INDEX 0x01CE
+#define VBE_DISPI_IOPORT_DATA 0x01CF
+
+/* VBE index values*/
+#define VBE_DISPI_INDEX_ID              0x0
+#define VBE_DISPI_INDEX_XRES            0x1
+#define VBE_DISPI_INDEX_YRES            0x2
+#define VBE_DISPI_INDEX_BPP             0x3
+#define VBE_DISPI_INDEX_ENABLE          0x4
+#define VBE_DISPI_INDEX_BANK            0x5
+#define VBE_DISPI_INDEX_VIRT_WIDTH      0x6
+#define VBE_DISPI_INDEX_VIRT_HEIGHT     0x7
+#define VBE_DISPI_INDEX_X_OFFSET        0x8
+#define VBE_DISPI_INDEX_Y_OFFSET        0x9
+
+/* BGA Version */
+#define VBE_DISPI_ID5   0xB0C5
+#define VBE_DISPI_ID4   0xB0C3 
+#define VBE_DISPI_ID3   0xB0C2
+#define VBE_DISPI_ID2   0xB0C1
+#define VBE_DISPI_ID1   0xB0C0
+
+
+/* BGA BIT DEPTH */
+#define VBE_DISPI_BPP_4 0x04
+#define VBE_DISPI_BPP_8 0x08
+#define VBE_DISPI_BPP_15 0x0F
+#define VBE_DISPI_BPP_16 0x10
+#define VBE_DISPI_BPP_24 0x18
+#define VBE_DISPI_BPP_32 0x20
+
+
+    /*unsigned short BGAReadRegister(unsigned short IndexValue){
+        // outpw(VBE_DISPI_IOPORT_INDEX, IndexValue);
+       // return inpw (VBE_DISPI_IOPORT_DATA);
+    }
+
+    int BGAIsAvailable (){
+        return (BGAReadRegister(VBE_DISPI_INDEX_ID) == VBE_DISPI_ID5);
+    }*/
--- a/kernel/drivers/vga/colors.h
+++ b/kernel/drivers/vga/colors.h
@ -0,0 +1,19 @@
+#pragma once 
+enum vga_color {
+	VGA_COLOR_BLACK = 0,
+	VGA_COLOR_BLUE = 1,
+	VGA_COLOR_GREEN = 2,
+	VGA_COLOR_CYAN = 3,
+	VGA_COLOR_RED = 4,
+	VGA_COLOR_MAGENTA = 5,
+	VGA_COLOR_BROWN = 6,
+	VGA_COLOR_LIGHT_GREY = 7,
+	VGA_COLOR_DARK_GREY = 8,
+	VGA_COLOR_LIGHT_BLUE = 9,
+	VGA_COLOR_LIGHT_GREEN = 10,
+	VGA_COLOR_LIGHT_CYAN = 11,
+	VGA_COLOR_LIGHT_RED = 12,
+	VGA_COLOR_LIGHT_MAGENTA = 13,
+	VGA_COLOR_LIGHT_BROWN = 14,
+	VGA_COLOR_WHITE = 15,
+};