Nigel/BarinkOS
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src folder -> source folder; makes merging with dev a bit easier.

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This commit is contained in:
Nigel Barink
2022-09-10 20:06:49 +02:00
parent 2e2693d1ea
commit 364d10d02e
77 changed files with 8 additions and 8 deletions
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46
source/kernel/drivers/ACPI/rsdp.cpp Normal file
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#include "rsdp.h"
void printRSD(RSDPTR* rsd){
printf("Signature: ");
for(int i = 0; i < 8; i++){
kterm_put(rsd->signature[i]);
}
kterm_put('\n');
printf("OEMID: ");
for(int i =0; i < 6 ; i++){
kterm_put (rsd->OEMID[i]);
}
kterm_put('\n');
printf("Revision: %d\n", rsd->Revision);
printf("RSDT Address: 0x%x\n", rsd->RsdtAddress );
}
RSDPTR* FindRSD(){
char* memory_byte = (char*) 0x000f2e14;
const void* string = "RSD PTR ";
for( ; (uint32_t) memory_byte < 0x0100000; memory_byte+=10){
if( memcmp(memory_byte , string , 8 ) == 0 ) {
printf("RSD PTR found at 0x%x !\n", memory_byte);
break;
}
}
printRSD((RSDPTR*) memory_byte);
return (RSDPTR*) memory_byte;
}
RSDT* getRSDT(RSDPTR* rsd){
RSDT* rsdt = (RSDT*) rsd->RsdtAddress;
printf("OEMID: ");
for(int i = 0; i < 6; i++){
kterm_put(rsdt->header.OEMID[i]);
}
kterm_put('\n');
return rsdt;
}

36
source/kernel/drivers/ACPI/rsdp.h Normal file
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#pragma once
#include <stdint.h>
#include "./../../tty/kterm.h"
#include "../../../libc/include/mem.h"
struct RSDPTR {
char signature[8];
uint8_t Checksum ;
char OEMID [6];
uint8_t Revision;
uint32_t RsdtAddress;
}__attribute__((packed));
struct ACPISDTHeader{
char Signature[4];
uint32_t Length;
uint8_t CheckSum;
char OEMID[6];
char OEMTableID[8];
uint32_t OEMRevision;
uint32_t CreatorID;
uint32_t CreatorRevision;
}__attribute__((packed));
struct RSDT{
struct ACPISDTHeader header;
uint32_t PointerToSDT[]; // Length of array : (header.Length - sizeof(header))/ 4
}__attribute__((packed));
//NOTE: only scans EBDA enough to find RSD PTR in QEMU
RSDPTR* FindRSD();
void printRSD(RSDPTR* rsd);
RSDT* getRSDT(RSDPTR* rsd);

247
source/kernel/drivers/IO/PCI/pci.cpp Normal file
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#include "pci.h"
#define PCI_BUS_ADDR_SHIFT 16
#define PCI_DEVICE_ADDR_SHIFT 11
#define PCI_FUNCTION_ADDR_SHIFT 8
#define PCI_ENABLE_ADDR_SHIFT 31
const char* GetClassCodeName (uint64_t ClassCode ) {
switch (ClassCode)
{
case 0x0 :
return "Unclassified";
break;
case 0x1:
return "Mass Storage Controller";
break;
case 0x2:
return "Network Controller";
break;
case 0x3:
return "Display Controller";
break;
case 0x4:
return "Multimedia Controller";
break;
case 0x5:
return "Memory Controller";
break;
case 0x6:
return "Bridge";
break;
case 0x7 :
return "Simple Communication Controller";
break;
case 0x8:
return "Base System Peripheral";
break;
case 0x9:
return "Input Device Controller";
break;
case 0xA:
return "Docking station";
break;
case 0xB:
return "Processor";
break;
case 0xC:
return "Serial Bus Controller";
break;
case 0xD:
return "Wireless Controller";
break;
case 0xE:
return "Intelligent Controller";
break;
case 0xF:
return "Satellite Communication Controller";
break;
case 0x10:
return "Encryption Controller";
break;
case 0x11:
return "Signal Processing Controller";
break;
case 0x12:
return "Processing Accelerator";
break;
case 0x13:
return "Non-Essential Instrumentation";
break;
default:
return "Unknown";
break;
}
}
const char* getVendor( uint32_t VendorID){
switch (VendorID)
{
case 0x8086:
return "Intel Corporation";
break;
case 0x10DE:
return "NVIDIA Corporation";
break;
case 0x1022:
return "Advanced Micro Devices, Inc.[AMD]";
break;
case 0x1002:
return "Advanced Micor Devices, Inc.[AMD/ATI]";
break;
default:
return "Vendor Unkown";
break;
}
}
uint32_t ConfigReadWord ( PCIBusAddress& PCIDeviceAddress , uint8_t offset){
outl(CONFIG_ADDRESS , PCIDeviceAddress.getAddress() | offset );
return inl(CONFIG_DATA);
}
uint32_t ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offset){
uint32_t address;
address = (uint32_t) (
((uint32_t) 1 << PCI_ENABLE_ADDR_SHIFT) |
((uint32_t)bus << PCI_BUS_ADDR_SHIFT) |
((uint32_t)device << PCI_DEVICE_ADDR_SHIFT) |
((uint32_t)func << PCI_FUNCTION_ADDR_SHIFT) |
offset );
outl(CONFIG_ADDRESS, address);
return inl(CONFIG_DATA);
}
uint8_t GetHeaderType( PCIBusAddress& PCIDeviceAddress ){
uint32_t header_information = ConfigReadWord(PCIDeviceAddress , 0xC);
return (uint8_t) (
((header_information >> 16) //Get higher half
& 0x00FF) // Select the last two bytes
& 0x7F ); // Mask bit 7 as it indicates if the device is a mulit function device!
}
uint16_t GetClassCodes( PCIBusAddress& PCIDeviceAddress ){
uint32_t classcodes = ConfigReadWord(PCIDeviceAddress, 0x8);
return (uint16_t)((uint32_t)classcodes >> 16);
}
bool IsMultiFunctionDevice(PCIBusAddress& PCIDeviceAddress){
uint32_t header_information = ConfigReadWord(PCIDeviceAddress, 0xC);
return (((header_information>>16)
& 0x80)
>> 7 );
}
void PrintPCIDeviceInfo (PCIBusAddress& PCIDeviceAddress)
{
uint32_t DeviceID = (GetDevice(PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function) >> 16);
uint32_t VendorID = GetDevice(PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function) & 0xFFFF;
printf("Device found!\n");
printf("Bus: %d, Device: %d, function: %d \n", PCIDeviceAddress.bus, PCIDeviceAddress.device, PCIDeviceAddress.function);
printf("DeviceID: 0x%x, Vendor: %s\n",
DeviceID
, getVendor(VendorID) );
uint8_t header_type = GetHeaderType(PCIDeviceAddress);
printf( "Header type: 0x%x\n", header_type);
uint16_t deviceClasses = GetClassCodes(PCIDeviceAddress);
printf("class: %s, subClass: %d\n\n", GetClassCodeName((deviceClasses >>8)), deviceClasses & 0xFF);
}
void PCI_Enumerate(){
int devicesFound = 0;
// loop through all possible busses, devices and their functions;
for( int bus = 0 ; bus < 256 ; bus++)
{
for(int device = 0; device < 32 ; device ++)
{
int function = 0;
//uint64_t DeviceIdentify = ConfigReadWord(bus, device, function,0x0);
uint32_t DeviceID = GetDevice(bus, device, function) >> 16;
if( DeviceID != 0xFFFF){
PCIBusAddress busAddress =
PCIBusAddress{bus, device, function };
PrintPCIDeviceInfo(busAddress);
// iterate over the functions if it is a multi function device!
if( IsMultiFunctionDevice(busAddress) ){
printf("Multi function device! \n");
printf("Check remaining Functions\n");
for ( function = 1 ; function < 8; function++)
{
uint32_t DeviceID = GetDevice(bus, device, function) >> 16;
if( DeviceID != 0xFFFF){
PCIBusAddress busAddress2 = PCIBusAddress{bus, device, function};
PrintPCIDeviceInfo(busAddress2);
devicesFound++;
}
}
}
devicesFound++;
}
}
}
printf("Found %d PCI devices!\n", devicesFound);
}
uint8_t GetProgIF (PCIBusAddress& PCIDeviceAddress){
uint32_t data = ConfigReadWord(PCIDeviceAddress, 0x8);
return ((data >> 8) & 0xFF);
}
uint32_t ReadBAR ( PCIBusAddress& PCIDeviceAddress, int bar_number){
int offsetToBar = 0x10 + (bar_number* 0x4);
return ConfigReadWord(PCIDeviceAddress, offsetToBar);
}

38
source/kernel/drivers/IO/PCI/pci.h Normal file
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#pragma once
#include <stdint.h>
#include "../io.h"
#include "../../../tty/kterm.h"
#include "../../../pci/pciDevice.h"
// Configuration Space Access Mechanism #1
#define CONFIG_ADDRESS 0xCF8 // Configuration adress that is to be accessed
#define CONFIG_DATA 0xCFC // Will do the actual configuration operation
extern const char* ClassCodeTable [0x13];
// Note: this could be used to make the api for receiving PCI class codes a bit
// nicer.
struct ClassCodes {
uint8_t ClassCode;
uint8_t DeviceClass;
}__attribute__((packed));
uint32_t ConfigReadWord (uint8_t bus, uint8_t device, uint8_t func, uint8_t offset);
uint32_t ConfigReadWord ( PCIBusAddress& PCIDeviceAddress , uint8_t offset);
inline uint64_t GetDevice (int bus, int device, int function ){
return ConfigReadWord(bus, device, function,0x0);
}
uint8_t GetHeaderType( PCIBusAddress& PCIDeviceAddress );
uint16_t GetClassCodes( PCIBusAddress& PICDeviceAddress );
const char* getVendor( uint64_t VendorID);
const char* GetClassCodeName (uint64_t ClassCode );
uint8_t GetProgIF (PCIBusAddress& PCIDeviceAddress);
void PCI_Enumerate();
uint32_t ReadBAR ( PCIBusAddress& PCIDeviceAddress, int bar_number);

194
source/kernel/drivers/IO/ata/ataDevice.cpp Normal file
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#include "ataDevice.h"
#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
void ATA_DEVICE::Soft_Reset(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive){
printf("Soft reseting drive...\n");
outb(channels[DEVICE_CHANNEL].base + 7 , 0x4);
// wait a bit..
for(int i = 0 ; i < 1000000; i++){
asm volatile("NOP");
}
outb(channels[DEVICE_CHANNEL].base + 7 , 0x0);
}
void ATA_DEVICE::Identify(uint16_t DEVICE_CHANNEL,DEVICE_DRIVE drive ){
// lets ignore which port we actually want to check for now !
/*
THE STEPS INVOLVED
1. Select the target drive by sending master (0x0A) or slave (0x0B) to the
drive select IO port
2. Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
3. Send the identify command (0xEC) to the command IO port
4. Read the status port
4.2 If the value is 0x0 the drive does not exist
4.3 If it has any other value continue
5. poll the status port until bit 7 is clear.
6. Check if the LBAmid and LBAhi ports are non-zero
6.2. If non-zero stop polling this is not an ATA device
6.3 If zero continue
7. poll status port until bit 3 is set or bit 0 is set
8. if err is clear, read the data from the data port
*/
//printf("channel selected: 0x%x", DEVICE_CHANNEL);
// Assuming Master here
// Select the target drive
outb(DEVICE_CHANNEL | 6, drive); // on the primary bus select the master drive
outb(DEVICE_CHANNEL | 6 , 0x0); // write 0 to the controlport for some reason
outb(DEVICE_CHANNEL | 6, drive);
uint8_t status = inb(DEVICE_CHANNEL | 7 );
if(status == 0x00){
printf("No drive\n");
return;
}
// send the identify command;
outb(DEVICE_CHANNEL | 7, 0xEC);
// set the sectorCount, LBAlo, LBAmid, LBA,hi IO ports to 0
outb(DEVICE_CHANNEL | 2, 0);
outb(DEVICE_CHANNEL | 3, 0);
outb(DEVICE_CHANNEL | 4, 0);
outb(DEVICE_CHANNEL | 5, 0);
// send the identify command ;
//printf("command sent!\n");
outb(DEVICE_CHANNEL | 7 , 0xEC);
// read the status port
uint8_t status2 = inb(DEVICE_CHANNEL | 7);
if( status2 == 0x00){
printf("No drive\n");
return;
}
//printf("Waiting until ready...\n");
while(((status2 & 0x80 == 0x80)
&& (status2 & 0x01) != 0x01)
) status2 = inb(DEVICE_CHANNEL | 7);
if( status2 & 0x01){
printf("Error!\n");
return ;
}
uint16_t deviceIdentify [256] = {0};
for ( int i = 0; i < 256; i++){
uint16_t data;
asm volatile ("inw %1, %0" : "=a"(data): "Nd"(DEVICE_CHANNEL));
deviceIdentify[i] = data;
}
printf("Model-label (ASCII hex): ");
for(int i = 27; i < 47; i++){
kterm_put((char)(deviceIdentify[i] >> 8));
kterm_put((char)(deviceIdentify[i] & 0x00FF));
}
kterm_put('\n');
}
void ATA_DEVICE::Read(uint16_t DEVICE_CHANNEL, DEVICE_DRIVE drive, uint32_t LBA, uint16_t* buffer) {
/*
Assume you have a sectorcount byte and a 28 bit LBA value. A sectorcount of 0 means 256 sectors = 128K.
Notes: - When you send a command byte and the RDY bit of the Status Registers is clear, you may have to wait (technically up to 30 seconds) for the drive to spin up, before DRQ sets. You may also need to ignore ERR and DF the first four times that you read the Status, if you are polling.
- for polling PIO drivers: After transferring the last uint16_t of a PIO data block to the data IO port, give the drive a 400ns delay to reset its DRQ bit (and possibly set BSY again, while emptying/filling its buffer to/from the drive).
- on the "magic bits" sent to port 0x1f6: Bit 6 (value = 0x40) is the LBA bit. This must be set for either LBA28 or LBA48 transfers. It must be clear for CHS transfers. Bits 7 and 5 are obsolete for current ATA drives, but must be set for backwards compatibility with very old (ATA1) drives.
An example of a 28 bit LBA PIO mode read on the Primary bus:
*/
const int sectorCount = 1;
// Floating bus check
uint8_t floatingBus = inb(DEVICE_CHANNEL | 7);
if (floatingBus == 0xFF){
printf("Floating bus!!");
return ;
}
printf("Read LBA: 0x%x\n", LBA);
// Send 0xE0 for the "master" or 0xF0 for the "slave", ORed with the highest 4 bits of the LBA to port 0x1F6: outb(0x1F6, 0xE0 | (slavebit << 4) | ((LBA >> 24) & 0x0F))
outb(DEVICE_CHANNEL | 6 , ( 0xE0 | (LBA >>28) ) );
// Send a NULL byte to port 0x1F1, if you like (it is ignored and wastes lots of CPU time): outb(0x1F1, 0x00)
outb(DEVICE_CHANNEL | 1, 0x0000 );
//Send the sectorcount to port 0x1F2: outb(0x1F2, (unsigned char) count)
outb(DEVICE_CHANNEL | 2, sectorCount);
//Send the low 8 bits of the LBA to port 0x1F3: outb(0x1F3, (unsigned char) LBA))
outb(DEVICE_CHANNEL | 3, LBA);
//Send the next 8 bits of the LBA to port 0x1F4: outb(0x1F4, (unsigned char)(LBA >> 8))
outb(DEVICE_CHANNEL | 4, (LBA >> 8));
//Send the next 8 bits of the LBA to port 0x1F5: outb(0x1F5, (unsigned char)(LBA >> 16))
outb(DEVICE_CHANNEL | 5, (LBA >> 16));
//Send the "READ SECTORS" command (0x20) to port 0x1F7: outb(0x1F7, 0x20)
outb(DEVICE_CHANNEL | 7, 0x20);
volatile int i,j;
for(i=0;i<2000;i++)
for(j=0;j<25000;j++)
asm("NOP");
//Wait for an IRQ or poll.
uint8_t status = inb(DEVICE_CHANNEL | 7);
if( status == 0x00){
printf("No drive\n");
return;
}
printf("Status: %x\n", status);
// Check if busy!
while((status & 0x80) == 0x80){
printf("Reading....\r");
status = inb(DEVICE_CHANNEL | 7);
}
if ((status & 0x01) == 0x01){
printf("Error occured during read!\n");
return;
}
//Transfer 256 16-bit values, a uint16_t at a time, into your buffer from I/O port 0x1F0.
if( status & 0x01){
printf("Error!\n");
printf("Status: 0x%x\n", status);
uint16_t error_register = inb(DEVICE_CHANNEL | 1);
printf("Error register 0x%x\n",error_register );
return ;
}
for ( int i = 0; i < 256; i++){
uint16_t data;
asm volatile ("inw %1, %0" : "=a"(data): "Nd"(DEVICE_CHANNEL));
// printf (" %x ", data);
buffer[i] = data;
}
//Then loop back to waiting for the next IRQ (or poll again -- see next note) for each successive sector.
}
void ATA_DEVICE::Write(uint16_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
printf("Not implemented\n");
}

31
source/kernel/drivers/IO/ata/ataDevice.h Normal file
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#pragma once
#include <stdint.h>
#include "../io.h"
#include "../../../ide/ideCommands.h"
#include "../../../ide/sampleIDE.definitions.h"
#include "../../../tty/kterm.h"
/*
* This first driver wil make use of IO ports.
* Doing so means reading or writing from disk is going
* to be very cpu intensive.
*
*/
enum DEVICE_DRIVE{
MASTER = 0xA0,
SLAVE = 0xB0
};
namespace ATA_DEVICE{
void Identify(uint16_t, DEVICE_DRIVE);
void Read (uint16_t, DEVICE_DRIVE, uint32_t, uint16_t*);
void Write(uint16_t, DEVICE_DRIVE);
void Soft_Reset(uint8_t ,DEVICE_DRIVE );
};

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source/kernel/drivers/IO/atapi/atapiDevice.cpp Normal file
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#include "atapiDevice.h"
#define IS_BIT_SET(x, bit) ((x >> bit & 0x1) == 1)
bool isPacketDevice(){
uint8_t LBAmid = inb(0x174);
uint8_t LBAhi = inb(0x175);
printf(" LBAmid: 0x%x, LBAhi: 0x%x");
return LBAmid == 0x14 && LBAhi == 0xEB;
}
void ATAPI_DEVICE::Identify(uint8_t DEVICE_CHANNEL,DEVICE_DRIVE drive ){
// lets ignore which port we actually want to check for now !
/* THE STEPS INVOLVED
1. Select the target drive by sending master (0x0A) or slave (0x0B) to the
drive select IO port
2. Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
3. Send the identify command (0xEC) to the command IO port
4. Read the status port
4.2 If the value is 0x0 the drive does not exist
4.3 If it has any other value continue
5. poll the status port until bit 7 is clear.
6. Check if the LBAmid and LBAhi ports are non-zero
6.2. If non-zero stop polling this is not an ATA device
6.3 If zero continue
7. poll status port until bit 3 is set or bit 0 is set
8. if err is clear, read the data from the data port
*/
// Select the target drive
outb(0x176, 0xA0); // on the secondary bus select the master drive
outb(0x170 + 0x206 , 0x0); // write 0 to the controlport for some reason
outb(0x176, 0xA0);
// read the status port
uint8_t status = inb(0x177);
printf("status after drive select: 0x%x\n",status);
if( status == 0x00){
printf("No drive\n");
return;
}
outb(0x176, 0xA0);
// Set the Sectorcount, LBAlo, LBAmid and LBAhi IO ports to 0
outb(0x172, 0);
outb(0x173, 0);
outb(0x174, 0);
outb(0x175, 0);
// send the identify command;
printf("command sent!\n");
outb(0x177, 0xA1);
// read the status port
uint8_t status2 = inb(0x177);
if( status2 == 0x00){
printf("No drive\n");
return;
}
printf("Waiting until ready...\n");
while(((status2 & 0x80 == 0x80)
&& (status2 & 0x01) != 0x01)
) status2 = inb(0x177);
if(status2 & 0x01){
printf("Error!");
return;
}
// READ DATA
uint16_t deviceIdentify [256] ={0};
for (int i= 0; i < 256; i++){
uint16_t data;
asm volatile ( "in %1, %0"
: "=a"(data)
: "Nd"(0x170) );
deviceIdentify[i] = data ;
}
printf("Model-label (ASCII hex):\n");
for(int i = 27; i < 47; i++){
printf(" %x ",deviceIdentify[i]);
}
printf("\nSerial number (ASCII hex):\n");
for (int i = 10; i < 19; i++){
printf(" %x ", deviceIdentify[i]);
}
printf("\nFirmware revision (ASCII hex):\n");
for (int i = 23; i < 26; i++){
printf(" %x ", deviceIdentify[i]);
}
printf("\nConfiguration: %x\n", deviceIdentify[0]);
printf("\nData received!\n");
}
void ATAPI_DEVICE::Read(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
printf("Not implemented");
}
void ATAPI_DEVICE::Write(uint8_t DEVICE_CHANNEL, DEVICE_DRIVE drive) {
printf("Not implemented");
}

29
source/kernel/drivers/IO/atapi/atapiDevice.h Normal file
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#pragma once
#include <stdint.h>
#include "../io.h"
#include "../../../ide/ideCommands.h"
#include "../../../ide/sampleIDE.definitions.h"
#include "../../../tty/kterm.h"
/*
* This first driver wil make use of IO ports.
* Doing so means reading or writing from disk is going
* to be very cpu intensive.
*
*/
enum DEVICE_DRIVE{
MASTER = 0xA0,
SLAVE = 0xB0
};
namespace ATAPI_DEVICE
{
bool isPacketDevice();
void Identify ( uint8_t, DEVICE_DRIVE );
void Read ( uint8_t, DEVICE_DRIVE );
void Write ( uint8_t, DEVICE_DRIVE );
};

76
source/kernel/drivers/IO/io.cpp Normal file
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#include "io.h"
unsigned char inb_p(unsigned short ){
// TODO: implement me!
return 0;
}
unsigned short inw(unsigned short ){
// TODO: implement me!
return 0;
}
unsigned short inw_p(unsigned short ){
// TODO: implement me!
return 0;
}
uint32_t inl( int port ){
unsigned int data;
asm volatile ("inl %w1, %0": "=a" (data): "d" (port));
return data;
}
unsigned int inl_p(unsigned short ){
// TODO: implement me!
return 0;
}
void b_p(unsigned char , unsigned short ){
}
void outw(unsigned short , unsigned short ){
}
void outw_p(unsigned short , unsigned short ){
}
void outl( int port , uint32_t data ){
asm volatile ("outl %0, %1" :: "a" (data), "dn"(port));
}
void outl_p(unsigned int , unsigned short ){
}
void insb(unsigned short , void *,
unsigned long ){
}
void insw(unsigned short , void *,
unsigned long ){
}
void insl(unsigned short , void *,
unsigned long ){
}
void outsb(unsigned short , const void *,
unsigned long ){
}
void outsw(unsigned short , const void *,
unsigned long ){
}
void outsl(unsigned short , const void *,
unsigned long ){
}
void io_wait(void)
{
/* TODO: This is probably fragile. */
asm volatile ( "jmp 1f\n\t"
"1:jmp 2f\n\t"
"2:" );
}

40
source/kernel/drivers/IO/io.h Normal file
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#pragma once
#include <stdint.h>
static inline uint8_t inb(uint16_t port)
{
uint8_t ret;
asm volatile ( "inb %1, %0"
: "=a"(ret)
: "Nd"(port) );
return ret;
}
unsigned char inb_p(unsigned short port);
unsigned short inw(unsigned short port);
unsigned short inw_p(unsigned short port);
uint32_t inl( int port );
unsigned int inl_p(unsigned short port);
static inline void outb(uint16_t port, uint8_t val)
{
asm volatile ( "outb %0, %1" : : "a"(val), "Nd"(port) );
}
void outb_p(unsigned char value, unsigned short port);
void outw(unsigned short value, unsigned short port);
void outw_p(unsigned short value, unsigned short port);
void outl( int port , uint32_t data );
void outl_p(unsigned int value, unsigned short port);
void insb(unsigned short port, void *addr,
unsigned long count);
void insw(unsigned short port, void *addr,
unsigned long count);
void insl(unsigned short port, void *addr,
unsigned long count);
void outsb(unsigned short port, const void *addr,
unsigned long count);
void outsw(unsigned short port, const void *addr,
unsigned long count);
void outsl(unsigned short port, const void *addr,
unsigned long count);
void io_wait();

41
source/kernel/drivers/VGA/VBE.h Normal file
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#define VBE_DISPI_IOPORT_INDEX 0x01CE
#define VBE_DISPI_IOPORT_DATA 0x01CF
/* VBE index values*/
#define VBE_DISPI_INDEX_ID 0x0
#define VBE_DISPI_INDEX_XRES 0x1
#define VBE_DISPI_INDEX_YRES 0x2
#define VBE_DISPI_INDEX_BPP 0x3
#define VBE_DISPI_INDEX_ENABLE 0x4
#define VBE_DISPI_INDEX_BANK 0x5
#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
#define VBE_DISPI_INDEX_X_OFFSET 0x8
#define VBE_DISPI_INDEX_Y_OFFSET 0x9
/* BGA Version */
#define VBE_DISPI_ID5 0xB0C5
#define VBE_DISPI_ID4 0xB0C3
#define VBE_DISPI_ID3 0xB0C2
#define VBE_DISPI_ID2 0xB0C1
#define VBE_DISPI_ID1 0xB0C0
/* BGA BIT DEPTH */
#define VBE_DISPI_BPP_4 0x04
#define VBE_DISPI_BPP_8 0x08
#define VBE_DISPI_BPP_15 0x0F
#define VBE_DISPI_BPP_16 0x10
#define VBE_DISPI_BPP_24 0x18
#define VBE_DISPI_BPP_32 0x20
/*unsigned short BGAReadRegister(unsigned short IndexValue){
// outpw(VBE_DISPI_IOPORT_INDEX, IndexValue);
// return inpw (VBE_DISPI_IOPORT_DATA);
}
int BGAIsAvailable (){
return (BGAReadRegister(VBE_DISPI_INDEX_ID) == VBE_DISPI_ID5);
}*/

19
source/kernel/drivers/VGA/colors.h Normal file
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#pragma once
enum vga_color {
VGA_COLOR_BLACK = 0,
VGA_COLOR_BLUE = 1,
VGA_COLOR_GREEN = 2,
VGA_COLOR_CYAN = 3,
VGA_COLOR_RED = 4,
VGA_COLOR_MAGENTA = 5,
VGA_COLOR_BROWN = 6,
VGA_COLOR_LIGHT_GREY = 7,
VGA_COLOR_DARK_GREY = 8,
VGA_COLOR_LIGHT_BLUE = 9,
VGA_COLOR_LIGHT_GREEN = 10,
VGA_COLOR_LIGHT_CYAN = 11,
VGA_COLOR_LIGHT_RED = 12,
VGA_COLOR_LIGHT_MAGENTA = 13,
VGA_COLOR_LIGHT_BROWN = 14,
VGA_COLOR_WHITE = 15,
};

38
source/kernel/drivers/cmos/cmos.cpp Normal file
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void ReadFromCMOS(unsigned char array[])
{
unsigned char tvalue, index;
for (index = 0; index < 128; index++)
{
asm(
"cli\n\t" // Disable interrupts
"mov al, index\n\t" // Move index address
// since the 0x80 bit of al is not set, NMI is active
"out 0x70,al\n\t" // Copy address to CMOS register
// some kind of real delay here is probably best
"in al,0x71\n\t" // Fetch 1 byte to al
"sti\n\t" // Enable interrupts
"mov tvalue,al\n\t");
array[index] = tvalue;
}
}
void WriteTOCMOS(unsigned char array[])
{
unsigned char index;
for(index = 0; index < 128; index++)
{
unsigned char tvalue = array[index];
asm("cli\n\t" // Clear interrupts
"mov al,index\n\t" // move index address
"out 0x70,al\n\t" // copy address to CMOS register
// some kind of real delay here is probably best
"mov al,tvalue\n\t" // move value to al
"out 0x71,al\n\t" // write 1 byte to CMOS
"sti\n\\t" ); // Enable interrupts
}
}