KERNEL: Implementing VMM & cleaning up

Folders now are alll lower case

Started working on the implementation of the Virtual memory manager. Implemented allocate and free page funtionality for as far as I can atm.

Implemented the

source/kernel/drivers/pci/pci.cpp

@@ -0,0 +1,108 @@
+#include "pci.h"
+
+uint16_t ConfigReadWord (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset){
+    uint32_t address;
+    uint32_t lbus = (uint32_t) bus;
+    uint32_t lslot = (uint32_t) slot;
+    uint32_t lfunc = (uint32_t) func;
+    uint16_t tmp = 0;
+
+    /* Create configuration address as per Figure 1 */
+    address = (uint32_t) ((lbus << 16) |  (lslot << 11) | (lfunc << 8) | (offset & 0xFC) |((uint32_t) 0x80000000) );
+    /*write out the address */ 
+    outl(CONFIG_ADDRESS, address);
+    /* read in the data */
+    /* (offset & 2 ) * 8 ) = o will choosse the first word of the 32 bits register*/
+    tmp = (uint16_t)((inl(CONFIG_DATA)) >> ((offset & 2) * 8) & 0xFFFF);
+    return (tmp);
+}
+
+uint16_t CheckVendor (uint8_t bus, uint8_t slot) {
+    uint16_t vendor, device;
+    /* 
+        Try and read the first configuration register. Since there ar no
+        vendors that == 0xFFFF, it must be a non-existent device.
+    */
+   if((vendor = ConfigReadWord(bus, slot, 0,0)) != 0xFFFF) {
+       device = ConfigReadWord(bus, slot, 0,2);
+        // Possible read more config values ...
+   } return (vendor);
+}
+
+void checkDevice (uint8_t bus, uint8_t device ) {
+    uint8_t function = 0;
+
+    uint16_t vendorID = CheckVendor(bus, device);
+    if (vendorID == 0xFFFF) {
+        return;
+    }
+
+    checkFunction (bus, device, function );
+    headerType = getHeaderType(bus, device, function );
+    if( (headerType & 0x80) != 0) {
+        /* It is  a multi-function device, so check remaining functions */
+        for (function = 1; function < 8; function++){
+            if (CheckVendor(bus, device)!= 0xFFFF){
+                checkFunction(bus, device, function );
+            } 
+        }
+    }
+
+}
+
+
+void checkFunction (uint8_t bus, uint8_t device, uint8_t function ){
+    uint8_t baseClass;
+    uint8_t subClass;
+    uint8_t secondaryBus;
+
+    baseClass = getBaseClass(bus, device, function);
+    subClass = getSubClass (bus, device, function );
+    if ( (baseClass == 0x06) && (subClass == 0x04)){
+        secondaryBus = getSecondaryBus(bus,device, function);
+        checkBus(secondaryBus);
+    }
+}
+
+
+// Brute-force scan
+void checkAllBuses (){
+    uint16_t bus;
+    uint8_t device;
+
+    for(bus = 0; bus < 256; bus++){
+        for(device = 0; device < 32; device++){
+            checkDevice(bus,device);
+        }
+    }
+}
+
+// Recursive scan
+void checkBus (uint8_t bus){
+    uint8_t device;
+
+    for(device = 0; device < 32; device ++){
+        checkDevice(bus,device);
+    }
+}
+
+void checkAllBuses(){
+    uint8_t function; 
+    uint8_t bus;
+
+    headerType = getHeaderType(0,0,0);
+    if ( (headerType & 0x80) == 0 ){
+        /* Single PCI host controller */
+        checkBus(0);
+    } else{
+        /* Multiple PCI host controllers */
+        for (function = 0; function < 8; function++){
+            if( CheckVendor(0,0) != 0xFFFF) {
+                break;
+            }
+            bus = function;
+            checkBus(bus);
+        }
+    }
+
+}

source/kernel/drivers/pci/pci.h

@@ -0,0 +1,58 @@
+#pragma once
+#include <stdint.h>
+#include "io.h"
+// Configuration Space Access Mechanism #1
+#define CONFIG_ADDRESS 0xCF8 // Configuration adress that is to be accessed
+#define CONFIG_DATA 0xCFC // Will do the actual configuration operation
+
+/*
+CONFIG_ADDRESS 
+
+32 bit register 
+
+bit 31      Enable bit      (Should CONFIG_DATA be translatedc to configuration cycles)      
+bit 30 - 24 Reserved    
+bit 23 - 16 Bus Number      (Choose a specific PCI BUS)
+bit 15 - 11 Device Number   (Selects specific device one the pci bus)
+bit 10 - 8  Function Number (Selects a specific function in a device)
+bit 7 -  0  Register Offset (Offset in the configuration space of 256 Bytes ) NOTE: lowest two bits will always be zero 
+
+*/
+
+
+/* 
+PCI Device structure
+
+Register    offset  bits 31-24  bits 23-16  bits 15-8   bits 7-0
+00          00      Device ID   <----       Vendor  ID  <-------
+01          04      Status      <----       Command     <-------
+02          08      Class code  Sub class   Prog IF     Revision ID
+03          0C      BIST        Header Type Ltncy Timer Cache line Size
+04          10      Base address #0 (BAR0) 
+05          14      Base address #1 (BAR1) 
+06          18      Base address #2 (BAR2) 
+07          1C      Base address #3 (BAR3)
+08          20      Base address #4 (BAR4)
+09          24      Base address #5 (BAR5)
+0A          28      Cardbus CIS Pointer
+0B          2C      Subsystem ID <------   Subsystem Vendor ID  <-------
+0C          30      Expansion ROM base address
+0D          34      Reserved     <-------   Capabilities Pointer <------
+0E          38      Reserved    <-------    <--------   <--------
+0F          3C      Max ltncy   Min Grant   Interrupt PIN   Interrupt Line
+
+*/
+
+
+/*
+The idea for now is to support the minimal things necessary to find ATA supported drives
+ */
+
+
+// Lets write some boiler plate configuration code
+
+uint16_t ConfigReadWord (uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
+
+uint16_t CheckVendor (uint8_t bus, uint8_t slot);
+
+void checkDevice (uint8_t bus, uint8_t device );