2021-05-16 14:53:14 +00:00
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#pragma once
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2023-02-03 20:47:05 +00:00
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#include "../io/io.h"
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2021-05-16 14:53:14 +00:00
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#define PIC1 0x20 /* IO base address for master PIC */
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#define PIC2 0xA0 /* IO base address for slave PIC */
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#define PIC1_COMMAND PIC1
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#define PIC1_DATA (PIC1+1)
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#define PIC2_COMMAND PIC2
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#define PIC2_DATA (PIC2+1)
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#define ICW1_ICW4 0x01 /* ICW4 (not) needed */
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#define ICW1_SINGLE 0x02 /* Single (cascade) mode */
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#define ICW1_INTERVAL4 0x04 /* Call address interval 4 (8) */
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#define ICW1_LEVEL 0x08 /* Level triggered (edge) mode */
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#define ICW1_INIT 0x10 /* Initialization - required! */
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#define ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */
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#define ICW4_AUTO 0x02 /* Auto (normal) EOI */
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#define ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */
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#define ICW4_BUF_MASTER 0x0C /* Buffered mode/master */
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#define ICW4_SFNM 0x10 /* Special fully nested (not) */
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#define PIC_EOI 0x20
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#define PIC_READ_IRR 0x0a /* OCW3 irq ready next CMD read */
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#define PIC_READ_ISR 0x0b /* OCW3 irq service next CMD read */
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extern "C"{
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extern void irq0 ();
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extern void irq1 ();
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extern void irq2 ();
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extern void irq3 ();
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extern void irq4 ();
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extern void irq5 ();
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extern void irq6 ();
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extern void irq7 ();
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extern void irq8 ();
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extern void irq9 ();
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extern void irq10 ();
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extern void irq11 ();
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extern void irq12 ();
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extern void irq13 ();
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extern void irq14 ();
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extern void irq15 ();
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void PIC_sendEOI (unsigned char irq);
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}
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2021-11-02 20:03:11 +00:00
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//static uint16_t __pic_get_irq_reg(int ocw3);
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2021-05-16 14:53:14 +00:00
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uint16_t pic_get_irr(void);
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uint16_t pic_get_isr(void);
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void PIC_remap (int offset1, int offset2 );
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